FinFETs with multiple fin heights
    31.
    发明授权

    公开(公告)号:US08748993B2

    公开(公告)日:2014-06-10

    申请号:US14046188

    申请日:2013-10-04

    IPC分类号: H01L27/088

    摘要: An integrated circuit structure includes a semiconductor substrate, and a FinFET over the semiconductor substrate. The FinFET includes a semiconductor fin; a gate dielectric on a top surface and sidewalls of the semiconductor fin; a gate electrode on the gate dielectric; and a source/drain region at an end of the semiconductor fin. A first pair of shallow trench isolation (STI) regions includes portions directly underlying portions of the source/drain regions, wherein the first pair of STI regions is separated by, and adjoining a semiconductor strip. The first pair of STI regions further has first top surfaces. A second pair of STI regions comprises portions directly underlying the gate electrode, wherein the second pair of STI regions is separated from each other by, and adjoining, the semiconductor strip. The second pair of STI regions has second top surfaces higher than the first top surfaces.

    Forming Inter-Device STI Regions and Intra-Device STI Regions Using Different Dielectric Materials
    32.
    发明申请
    Forming Inter-Device STI Regions and Intra-Device STI Regions Using Different Dielectric Materials 有权
    使用不同介质材料形成器件间STI区域和器件内STI区域

    公开(公告)号:US20140004682A1

    公开(公告)日:2014-01-02

    申请号:US14019338

    申请日:2013-09-05

    IPC分类号: H01L21/762

    摘要: An integrated circuit structure includes a substrate having a first portion in a first device region and a second portion in a second device region; and two insulation regions in the first device region and over the substrate. The two insulation regions include a first dielectric material having a first k value. A semiconductor strip is between and adjoining the two insulation regions, with a top portion of the semiconductor strip forming a semiconductor fin over top surfaces of the two insulation regions. An additional insulation region is in the second device region and over the substrate. The additional insulation region includes a second dielectric material having a second k value greater than the first k value.

    摘要翻译: 集成电路结构包括具有第一器件区域中的第一部分和第二器件区域中的第二部分的衬底; 以及在第一器件区域和衬底上的两个绝缘区域。 两个绝缘区域包括具有第一k值的第一电介质材料。 半导体条在两个绝缘区之间并相邻,半导体条的顶部在两个绝缘区的顶表面上形成半导体鳍。 另外的绝缘区域位于第二器件区域和衬底之上。 附加绝缘区域包括具有大于第一k值的第二k值的第二电介质材料。