利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

81 条记录 (耗时 0.029 秒)

    FinFET structures and methods of forming the same
    4.
    发明授权
    FinFET structures and methods of forming the same 有权

    公开(公告)号：US10134847B2

    公开(公告)日：2018-11-20

    申请号：US15589788

    申请日：2017-05-08

    申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

    发明人： Chih Chieh Yeh ,  Cheng-Yi Peng ,  Tsung-Lin Lee

    IPC分类号： H01L29/66 ,  H01L29/15 ,  H01L21/306 ,  H01L27/088 ,  H01L29/10 ,  H01L29/78 ,  H01L21/8238 ,  H01L21/762 ,  H01L27/092 ,  H01L29/08

    摘要： FinFETs and methods of forming finFETs are described. According to some embodiments, a structure includes a channel region, first and second source/drain regions, a dielectric layer, and a gate electrode. The channel region includes semiconductor layers above a substrate. Each of the semiconductor layers is separated from neighboring ones of the semiconductor layers, and each of the semiconductor layers has first and second sidewalls. The first and second sidewalls are aligned along a first and second plane, respectively, extending perpendicularly to the substrate. The first and second source/drain regions are disposed on opposite sides of the channel region. The semiconductor layers extend from the first source/drain region to the second source/drain region. The dielectric layer contacts the first and second sidewalls of the semiconductor layers, and the dielectric layer extends into a region between the first plane and the second plane. The gate electrode is over the dielectric layer.

    FINFET Structures and Methods of Forming the Same
    6.
    发明申请
    FINFET Structures and Methods of Forming the Same 有权
    FINFET结构及其形成方法

    公开(公告)号：US20160365414A1

    公开(公告)日：2016-12-15

    申请号：US14739928

    申请日：2015-06-15

    申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

    发明人： Cheng-Yi Peng ,  Chih Chieh Yeh ,  Tsung-Lin Lee

    IPC分类号： H01L29/15 ,  H01L21/306 ,  H01L27/088 ,  H01L29/66 ,  H01L29/78 ,  H01L29/10

    CPC分类号： H01L29/155 ,  H01L21/30604 ,  H01L21/76224 ,  H01L21/823807 ,  H01L21/823821 ,  H01L21/823878 ,  H01L27/0886 ,  H01L27/0924 ,  H01L29/0847 ,  H01L29/1054 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/66636 ,  H01L29/66795 ,  H01L29/7842 ,  H01L29/7851

    摘要： FinFETs and methods of forming finFETs are described. According to some embodiments, a structure includes a channel region, first and second source/drain regions, a dielectric layer, and a gate electrode. The channel region includes semiconductor layers above a substrate. Each of the semiconductor layers is separated from neighboring ones of the semiconductor layers, and each of the semiconductor layers has first and second sidewalls. The first and second sidewalls are aligned along a first and second plane, respectively, extending perpendicularly to the substrate. The first and second source/drain regions are disposed on opposite sides of the channel region. The semiconductor layers extend from the first source/drain region to the second source/drain region. The dielectric layer contacts the first and second sidewalls of the semiconductor layers, and the dielectric layer extends into a region between the first plane and the second plane. The gate electrode is over the dielectric layer.

    摘要翻译： 描述FinFET和形成finFET的方法。 根据一些实施例，结构包括沟道区，第一和第二源极/漏极区，电介质层和栅电极。 沟道区域包括衬底上方的半导体层。 每个半导体层与相邻的半导体层分离，并且每个半导体层具有第一和第二侧壁。 第一和第二侧壁分别沿垂直于衬底延伸的第一和第二平面排列。 第一和第二源极/漏极区域设置在沟道区域的相对侧上。 半导体层从第一源极/漏极区域延伸到第二源极/漏极区域。 电介质层接触半导体层的第一和第二侧壁，电介质层延伸到第一平面和第二平面之间的区域。 栅电极在电介质层的上方。

    FinFETs with multiple fin heights
    9.
    发明授权
    FinFETs with multiple fin heights 有权
    FinFET具有多个翅片高度

    公开(公告)号：US08673709B2

    公开(公告)日：2014-03-18

    申请号：US13764549

    申请日：2013-02-11

    申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

    发明人： Tsung-Lin Lee ,  Chih Chieh Yeh ,  Chang-Yun Chang ,  Feng Yuan

    IPC分类号： H01L21/8234

    CPC分类号： H01L29/66666 ,  H01L21/76 ,  H01L21/823431 ,  H01L27/0886 ,  H01L29/66795 ,  H01L29/785

    摘要： An integrated circuit structure includes a semiconductor substrate, and a FinFET over the semiconductor substrate. The FinFET includes a semiconductor fin; a gate dielectric on a top surface and sidewalls of the semiconductor fin; a gate electrode on the gate dielectric; and a source/drain region at an end of the semiconductor fin. A first pair of shallow trench isolation (STI) regions includes portions directly underlying portions of the source/drain regions, wherein the first pair of STI regions is separated by, and adjoining a semiconductor strip. The first pair of STI regions further has first top surfaces. A second pair of STI regions comprises portions directly underlying the gate electrode, wherein the second pair of STI regions is separated from each other by, and adjoining, the semiconductor strip. The second pair of STI regions has second top surfaces higher than the first top surfaces.

    摘要翻译： 集成电路结构包括半导体衬底和半导体衬底上的FinFET。 FinFET包括半导体鳍片; 顶表面上的栅极电介质和半导体鳍片的侧壁; 栅电极上的栅电极; 以及在半导体鳍片的端部处的源极/漏极区域。 第一对浅沟槽隔离（STI）区域包括直接在源极/漏极区域的下方部分的部分，其中第一对STI区域被分隔开并邻接半导体条带。 第一对STI区域还具有第一顶面。 第二对STI区域包括直接位于栅极电极下方的部分，其中第二对STI区域彼此分开并邻接半导体条带。 第二对STI区域具有高于第一顶表面的第二顶表面。

    Fin field effect transistor (FinFET) device structure with dummy Fin structure
    10.
    发明授权
    Fin field effect transistor (FinFET) device structure with dummy Fin structure 有权

    公开(公告)号：US11569130B2

    公开(公告)日：2023-01-31

    申请号：US17031023

    申请日：2020-09-24

    申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

    发明人： Tzung-Yi Tsai ,  Yen-Ming Chen ,  Tsung-Lin Lee ,  Chih-Chieh Yeh

    IPC分类号： H01L21/8234 ,  H01L27/088

    摘要： A fin field effect transistor (FinFET) device structure with dummy fin structures and method for forming the same are provided. The FinFET device structure includes an isolation structure over a substrate, and a first fin structure extended above the isolation structure. The fin field effect transistor (FinFET) device structure includes a second fin structure adjacent to the first fin structure, and a material layer formed over the fin structure. The material layer and the isolation structure are made of different materials, the material layer has a top surface with a top width and a bottom surface with a bottom width, and the bottom width is greater than the top width.