Method and apparatus for providing user-defined interfaces for a configurable processor
    31.
    发明授权
    Method and apparatus for providing user-defined interfaces for a configurable processor 有权
    用于为可配置处理器提供用户定义的接口的方法和装置

    公开(公告)号:US08539399B1

    公开(公告)日:2013-09-17

    申请号:US11829063

    申请日:2007-07-26

    IPC分类号: G06F17/50

    摘要: A technique that improves both processor performance and associated data bandwidth through user-defined interfaces that can be added to a configurable and extensible microprocessor core. These interfaces can be used to communicate status or control information and to achieve synchronization between the processor and any external device including other processors. These interfaces can also be used to achieve data transfer at the rate of one data element per interface in every clock cycle. This technique makes it possible to design multiprocessor SOC systems with high-speed data transfer between processors without using the memory subsystem. Such a system and design methodology offers a complete shift from the standard bus-based architecture and allows designers to treat processors more like true computational units, so that designers can more effectively utilize programmable solutions rather than design dedicated hardware. This can have dramatic effects not only in the performance and bandwidth achieved by designs, but also in the time to market and reuse of such designs.

    摘要翻译: 一种通过可以添加到可配置和可扩展的微处理器内核的用户定义接口来提高处理器性能和相关数据带宽的技术。 这些接口可用于传送状态或控制信息,并实现处理器与包括其他处理器在内的任何外部设备之间的同步。 这些接口也可用于在每个时钟周期以每个接口的一个数据元素的速率实现数据传输。 这种技术使得可以在不使用存储器子系统的情况下,在处理器之间设计具有高速数据传输的多处理器SOC系统。 这种系统和设计方法提供了从基于标准总线的架构的全面转变,并允许设计人员将处理器视为真正的计算单元,从而使设计人员能够更有效地利用可编程解决方案,而不是设计专用硬件。 这不仅可以在设计实现的性能和带宽方面,而且在上市时间和这种设计的再利用方面都会产生戏剧性的影响。

    Method and apparatus for providing user-defined interfaces for a configurable processor
    32.
    发明授权
    Method and apparatus for providing user-defined interfaces for a configurable processor 有权
    用于为可配置处理器提供用户定义的接口的方法和装置

    公开(公告)号:US07664928B1

    公开(公告)日:2010-02-16

    申请号:US11039757

    申请日:2005-01-19

    IPC分类号: G06F15/00

    摘要: A technique that improves both processor performance and associated data bandwidth through user-defined interfaces that can be added to a configurable and extensible microprocessor core. These interfaces can be used to communicate status or control information and to achieve synchronization between the processor and any external device including other processors. These interfaces can also be used to achieve data transfer at the rate of one data element per interface in every clock cycle. This technique makes it possible to design multiprocessor SOC systems with high-speed data transfer between processors without using the memory subsystem. Such a system and design methodology offers a complete shift from the standard bus-based architecture and allows designers to treat processors more like true computational units, so that designers can more effectively utilize programmable solutions rather than design dedicated hardware. This can have dramatic effects not only in the performance and bandwidth achieved by designs, but also in the time to market and reuse of such designs.

    摘要翻译: 一种通过可以添加到可配置和可扩展的微处理器内核的用户定义接口来提高处理器性能和相关数据带宽的技术。 这些接口可用于传送状态或控制信息,并实现处理器与包括其他处理器在内的任何外部设备之间的同步。 这些接口也可用于在每个时钟周期以每个接口的一个数据元素的速率实现数据传输。 这种技术使得可以在不使用存储器子系统的情况下,在处理器之间设计具有高速数据传输的多处理器SOC系统。 这种系统和设计方法提供了从基于标准总线的架构的全面转变,并允许设计人员将处理器视为真正的计算单元,从而使设计人员能够更有效地利用可编程解决方案,而不是设计专用硬件。 这不仅可以在设计实现的性能和带宽方面,而且在上市时间和这种设计的再利用方面都会产生戏剧性的影响。

    Multiprocessor system utilizing multiple links to improve point to point bandwidth
    33.
    发明授权
    Multiprocessor system utilizing multiple links to improve point to point bandwidth 有权
    多处理器系统利用多个链路来提高点对点带宽

    公开(公告)号:US06643764B1

    公开(公告)日:2003-11-04

    申请号:US09620372

    申请日:2000-07-20

    IPC分类号: G06F15163

    摘要: A multiprocessor computer system comprises a plurality of processing element nodes and an interconnect network interconnecting the plurality of processing element nodes. An interface circuit is associated with each one of the plurality of processing element nodes. The interface circuit has a lookup table having n-number of routing entries for a given destination node. Each one of the n-number of routing entries associated with a different class of traffic. The network traffic is routed according to the class.

    摘要翻译: 多处理器计算机系统包括多个处理单元节点和互连多个处理单元节点的互连网络。 接口电路与多个处理元件节点中的每一个相关联。 接口电路具有用于给定目的地节点的具有n个路由条目的查找表。 与不同类别的流量相关联的n个路由条目中的每一个。 网络流量根据类进行路由。

    Method for testing a tape carrier package
    34.
    发明授权
    Method for testing a tape carrier package 失效
    测试胶带载体包装的方法

    公开(公告)号:US6127196A

    公开(公告)日:2000-10-03

    申请号:US69273

    申请日:1998-04-29

    IPC分类号: G01R1/04 G01R31/26

    CPC分类号: G01R1/0475

    摘要: Methods for testing a [A] tape carrier package (TCP) for an integrated circuit device that includes two sets of test pads. A first set of test pads are located along the outer edges of the TCP and are used to test the performance of the integrated circuit device once the TCP has been fabricated and assembled. A second set of test pads is also provided between the TCP outer leads and integrated circuit device for testing the performance of the device once the TCP has been removed from a printed circuit board.

    摘要翻译: 用于测试包括两组测试垫的集成电路器件的[A]载带封装(TCP)的方法。 第一组测试焊盘沿着TCP的外边缘定位,并且一旦TCP被制造和组装就用于测试集成电路器件的性能。 TCP外部引线和集成电路器件之间还提供第二组测试焊盘,用于一旦从印刷电路板上移除TCP,就可以测试器件的性能。

    Cycloalkyl-type isotropic dyes for liquid crystal display devices
    35.
    发明授权
    Cycloalkyl-type isotropic dyes for liquid crystal display devices 失效
    用于液晶显示装置的环烷基型各向同性染料

    公开(公告)号:US4448492A

    公开(公告)日:1984-05-15

    申请号:US452812

    申请日:1982-12-23

    CPC分类号: C09K19/60 C09B57/00

    摘要: Certain cycloalkyl-type compounds have been found to be useful as isotropic dyestuffs in guest-host combinations with nematic, cholesteric and smectic liquid crystals and other well-known dichroic dyestuffs. By "isotropic" it is meant that the disclosed dyestuffs have optical order parameters (S) very close to zero. Use of the disclosed isotropic dyestuffs with additional well-known dichroic dyes in liquid crystal display devices, provides displays which alter between one colored state and another, depending upon the presence or absence of an electric field across the display.

    摘要翻译: 已经发现某些环烷基型化合物可用作与向列型,胆甾醇型和近晶型液晶等众所周知的二色性染料的客体 - 主体组合中的各向同性染料。 “各向同性”是指所公开的染料具有非常接近零的光学顺序参数(S)。 在液晶显示装置中使用所公开的各向同性染料与另外公知的二色性染料,根据显示器上是否存在电场,提供在一种着色状态和另一种着色状态之间改变的显示器。

    Helichromic compounds and displays
    36.
    发明授权
    Helichromic compounds and displays 失效
    直链化合物和显示

    公开(公告)号:US4394070A

    公开(公告)日:1983-07-19

    申请号:US274184

    申请日:1981-06-22

    IPC分类号: C09K19/60 G02F1/13 C09K3/34

    CPC分类号: C09K19/60

    摘要: A composition for use in liquid crystal display devices, consisting essentially of a nematic liquid crystal material and a helichromic compound possessing both a chromophoric moiety and a helical ordering moiety. The helical ordering moiety is capable of helically ordering the mixture of liquid crystal material and helichromic compound. The helichromic compound can be utilized in conventional "guest-host" and "twist nematic" displays as well as in unique helichromic displays. When used in helichromic displays, the helichromic compounds eliminate after-image scattering and enable the display to be operated at reduced voltages.

    摘要翻译: 用于液晶显示装置的组合物,主要由向列型液晶材料和具有发色部分和螺旋排列部分的双重铬化合物组成。 螺旋排列部分能够螺旋排列液晶材料和直链氢化合物的混合物。 可以使用常规的“客体主体”和“扭转向列”显示器以及独特的直角重铬酸显示器。 当用于Helichromic显示器时,Helichromic化合物消除了后图像散射,并使得显示器能够以降低的电压工作。

    Anthraquinone amino pleochroic dyes
    38.
    发明授权
    Anthraquinone amino pleochroic dyes 失效
    蒽醌氨基多色染料

    公开(公告)号:US4154746A

    公开(公告)日:1979-05-15

    申请号:US909005

    申请日:1978-05-24

    CPC分类号: C09B1/205 C09K19/603

    摘要: Anils of 1,4- and 1,8-diaminoanthraquinone with p-alkyl- and p-alkoxybenzaldehyde are found to be pleochroic dyes which form guest-host combinations with dielectrically positive anisotropic nematic liquid crystals. These combinations are of value in electro-optical display devices.

    摘要翻译: 发现1,4-和1,8-二氨基蒽醌与对 - 烷基 - 和对 - 烷氧基苯甲醛的to to which。。。。。。。。。。。。。。。。。。。。。。。 这些组合在电光显示装置中是有价值的。

    Interface for synchronous data transfer between domains clocked at different frequencies
    39.
    发明授权
    Interface for synchronous data transfer between domains clocked at different frequencies 有权
    用于以不同频率计时的域之间的同步数据传输接口

    公开(公告)号:US07333516B1

    公开(公告)日:2008-02-19

    申请号:US09621315

    申请日:2000-07-20

    IPC分类号: H04J3/06

    摘要: The present invention provides an interface and method for synchronous data transfer between domains clocked at different frequencies. The interface includes a first latch for receiving data from a first domain clocked at one frequency when the first latch is selected and a second latch for receiving data from the first domain when the second latch is selected. A third latch is provided for transferring data from either the first latch or the second latch to the second domain when the second domain is clocked.

    摘要翻译: 本发明提供了一种用于以不同频率计时的域之间的同步数据传输的接口和方法。 接口包括第一锁存器,用于当选择第一锁存器时以一个频率时钟的第一域接收数据;以及第二锁存器,用于当选择第二锁存器时从第一域接收数据。 提供第三锁存器,用于当第二域被计时时将数据从第一锁存器或第二锁存器传送到第二域。

    Method and system for covering multiple resourcces with a single credit in a computer system
    40.
    发明授权
    Method and system for covering multiple resourcces with a single credit in a computer system 有权
    在计算机系统中用单一信用来覆盖多个资源的方法和系统

    公开(公告)号:US07007097B1

    公开(公告)日:2006-02-28

    申请号:US09910584

    申请日:2001-07-20

    CPC分类号: G06F13/14 G06F5/065 G06F5/14

    摘要: A method and system for communicating to a sender an availability of receiving a new message includes providing buffers having at least one corresponding slot for storing a message and providing a credit signal that communicates to the sender only when all of the buffers have at least one of the corresponding slot available for storing a new message. Each of the buffers is monitored for whether at least one of the corresponding slots is available for storing the new message. A corresponding receiver counter is provided for each of the buffers. Each receiver counter is decremented when all of the buffers have at least one corresponding slot available for storing the new message. Each of the buffers is configured to receive a corresponding particular message type. The particular message type of the new message is determined. The new message is loaded into the corresponding slot of one of the buffers which is configured for receiving the particular message type of the new message. The counter of each of the buffers in which the new message was not loaded is incremented. After the loaded new message is freed from the buffer in which it was loaded, the counter of the buffer in which the new message was loaded is incremented.

    摘要翻译: 一种用于向发送者通信接收新消息的可用性的方法和系统包括提供具有至少一个对应时隙的缓冲器,用于存储消息并提供信用信号,所述信用信号仅在所有缓冲器具有至少一个缓冲器 相应的时隙可用于存储新消息。 监视每个缓冲器是否至少有一个对应的时隙可用于存储新的消息。 为每个缓冲器提供相应的接收器计数器。 当所有缓冲器具有可用于存储新消息的至少一个对应的时隙时,每个接收机计数器递减。 每个缓冲器被配置为接收相应的特定消息类型。 确定新消息的特定消息类型。 新消息被加载到被配置为接收新消息的特定消息类型的缓冲器之一的相应时隙中。 新消息未加载的每个缓冲区的计数器递增。 加载的新消息从其加载的缓冲区中释放出来后,加载新消息的缓冲区的计数器递增。