公开(公告)号：US11561894B2

公开(公告)日：2023-01-24

申请号：US17142980

申请日：2021-01-06

Applicant: VMware, Inc.

Inventor： Andrei Warkentin ,  Alexander Fainkichen ,  Ye Li ,  Regis Duchesne ,  Cyprien Laplace ,  Shruthi Hiriyuru ,  Sunil Kotian

IPC: G06F12/06 ,  G06F9/455 ,  G06F13/16 ,  G06F13/42

Abstract: Techniques for enabling efficient guest OS access to PCIe configuration space are provided. In one set of embodiments, a hypervisor can reserve a single host physical memory page in the host physical memory of a host system and can populate the single host physical memory page with a value indicating non-presence of PCIe device functions. The hypervisor can then create, for each guest physical memory page in a guest physical memory of a virtual machine (VM) corresponding to a PCIe configuration space of an absent PCIe device function in the VM, a mapping in the hypervisor's second-level page tables that maps the guest physical memory page to the single host physical memory page.

公开(公告)号：US11113071B1

公开(公告)日：2021-09-07

申请号：US16935903

申请日：2020-07-22

Applicant: VMware, Inc.

Inventor： Cyprien Laplace ,  Andrei Warkentin ,  Shruthi Muralidhara Hiriyuru ,  Ye Li ,  Alexander Fainkichen ,  Regis Duchesne ,  Sunil Kumar Kotian ,  Renaud Benjamin Voltz

IPC: G06F9/44 ,  G06F9/4401 ,  G06F8/61

Abstract: A method for booting a computer system includes: loading a first stage bootloader of a plurality of first stage bootloaders from a boot image based on a known configuration of the computer system; executing the first stage bootloader to identify a selected bootbank of a plurality of bootbanks in the boot image based on the known configuration of the computer system; executing, by the first stage bootloader, a second stage bootloader from the boot image with an instruction to boot from the selected bootbank; and executing, by the second stage bootloader, a binary file in the selected bootbank.

公开(公告)号：US10922253B1

公开(公告)日：2021-02-16

申请号：US16660337

申请日：2019-10-22

Applicant: VMware, Inc.

Inventor： Regis Duchesne ,  Alexander Fainkichen ,  Cyprien Laplace ,  Ye Li ,  Andrei Warkentin

IPC: G06F13/24 ,  G06F13/16 ,  G06F13/10

Abstract: Disclosed are various embodiments for software-based interrupt remapping. A memory address for a respective interrupt request of the peripheral device is allocated. The peripheral device is then configured to write to the memory address to raise an interrupt with the processor. Later, it can be determined that the peripheral device has attempted to write to the memory address. In response, an interrupt can be raised for the respective interrupt request with the processor of the computing device on behalf of the peripheral device.

公开(公告)号：US10853284B1

公开(公告)日：2020-12-01

申请号：US16518818

申请日：2019-07-22

Applicant: VMware, Inc.

Inventor： Andrei Warkentin ,  Ye Li ,  Alexander Fainkichen ,  Cyprien Laplace

IPC: G06F13/26 ,  G06F13/42

Abstract: A method of handling message signaled interrupts in a computer system that uses an internal bus for communication between peripheral devices, using shared peripheral interrupt (SPI) vectors. The method includes determining whether a message signaled interrupt (MSI) needs to be allocated for a PCI-e device for an interrupt to be sent to a host. If it is determined that MSI needs to be allocated for the PCI-e device, a determination is made as to whether a Locality Specific Interrupt (LPI) register or an Interrupt Translation Service (ITS) is available to process the interrupt. If it is determined that neither the LPI register nor the Interrupt Translation Service (ITS) is available to process the interrupt, the PCI-e device is configured for SPI-based MSI generation to route the interrupt by determining an available SPI vector and assigning the available SPI vector to the PCI-e device.

公开(公告)号：US10776287B2

公开(公告)日：2020-09-15

申请号：US15898714

申请日：2018-02-19

Applicant: VMware, Inc.

Inventor： Andrei Warkentin ,  Cyprien Laplace ,  Ye Li ,  Alexander Fainkichen ,  Regis Duchesne

IPC: G06F13/10 ,  G06F9/455 ,  G06T11/00

Abstract: An example method of accessing a computing system includes: providing serial terminal driver configured to interface a serial port in a hardware platform of the computer system; providing a console object configured to communicate with an operating system (OS) in a software platform of the computer system and the serial terminal driver; connecting to the console object through the serial port via a computer terminal; sending text and commands from the console object to the computer terminal; and rendering, by the computer terminal, a console for presentation on a display of the computer terminal.