Output circuit for a semiconductor memory device and data output method
    31.
    发明授权
    Output circuit for a semiconductor memory device and data output method 有权
    半导体存储器件的输出电路和数据输出方法

    公开(公告)号:US08149632B2

    公开(公告)日:2012-04-03

    申请号:US12707140

    申请日:2010-02-17

    申请人: Yoshinori Matsui

    发明人: Yoshinori Matsui

    IPC分类号: G11C7/00

    CPC分类号: G11C7/1051 G11C7/1057

    摘要: An outputting transistor circuit of a push-pull structure has an outputting PMOS transistor and an outputting NMOS transistor connected in series between a first power supply and a grounded power supply. In a standby state, a voltage level of a gate terminal of the outputting PMOS transistor is set to a voltage level of a second power supply higher than a voltage level of the first power supply. In an active state, a voltage level of the gate terminal of the outputting PMOS transistor is changed to a voltage level of the first power supply in response to an active command or a read command, or in response to the state of a semiconductor memory device changing to the active state or a read state, and either the outputting PMOS transistor or the outputting NMOS transistor is turned ON in response to a data read signal from a memory cell.

    摘要翻译: 推挽结构的输出晶体管电路具有串联连接在第一电源和接地电源之间的输出PMOS晶体管和输出NMOS晶体管。 在待机状态下,输出PMOS晶体管的栅极端子的电压电平被设定为比第一电源的电压电平高的第二电源的电压电平。 在激活状态下,输出PMOS晶体管的栅极端子的电压电平响应于有效命令或读取命令而变为第一电源的电压电平,或者响应于半导体存储器件的状态 改变到活动状态或读取状态,并且响应于来自存储器单元的数据读取信号,输出PMOS晶体管或输出NMOS晶体管导通。

    Encoder including a light detecting device having two signal processing sections for pixels in a first and second direction
    32.
    发明授权
    Encoder including a light detecting device having two signal processing sections for pixels in a first and second direction 有权
    编码器包括光检测装置,具有用于第一和第二方向的像素的两个信号处理部分

    公开(公告)号:US07781726B2

    公开(公告)日:2010-08-24

    申请号:US11664497

    申请日:2005-10-03

    IPC分类号: G01D5/34 H01J40/14

    CPC分类号: G01D5/34792

    摘要: An encoder calculates an absolute value of an operating angle of a scale plate. The scale plate includes light relay portions formed along an operational direction α in the scale plate with a pattern of a one-dimensional array of optically transparent portions and optically nontransparent portions. The encoder identifies the light relay portion formed on a light receiving region, based on second light intensity profile data VY(m), and by using the patterns of optically transparent and optically nontransparent portions as codes. The position of a light relay portion can be accurately retrieved using reference positions for each light relay portion in the scale plate. The encoder calculates a center-of-gravity position of the identified light relay portion relative to a reference position in the light receiving region, based on first light intensity profile VX(n), and calculates an operating angle of the scale plate from the center-of-gravity position.

    摘要翻译: 编码器计算刻度板的操作角度的绝对值。 刻度板包括在刻度板上沿着操作方向α形成的光中继部,其具有光学透明部分和光学不透明部分的一维阵列的图案。 编码器基于第二光强度分布数据VY(m)识别在光接收区域上形成的光中继部分,并且通过使用光学透明和光学不透明部分的图案作为代码。 可以使用标尺板中的每个光中继部分的参考位置来精确地检索光继电器部分的位置。 编码器基于第一光强度分布VX(n)计算出所识别的光中继部分相对于光接收区域中的参考位置的重心位置,并且从中心计算刻度板的操作角度 重力位置。

    MULTIPORT MEMORY AND INFORMATION PROCESSING SYSTEM
    34.
    发明申请
    MULTIPORT MEMORY AND INFORMATION PROCESSING SYSTEM 有权
    多媒体存储和信息处理系统

    公开(公告)号:US20090248993A1

    公开(公告)日:2009-10-01

    申请号:US12411974

    申请日:2009-03-26

    IPC分类号: G06F12/00

    CPC分类号: G11C7/1075 G06F13/1663

    摘要: In an information processing system, a plurality of information processing devices CHIP0 and CHIP1 are connected to multiport memory MPMEM0 that has a plurality of ports, and memory areas in multiport memory MPMEM0 can be altered to memory areas occupied by particular ports and memory areas shared by a plurality of ports. At such times, immediately after the occurrence of a request from a port, the status of this request may be supplied from other ports.

    摘要翻译: 在信息处理系统中,多个信息处理装置CHIP0和CHIP1连接到具有多个端口的多端口存储器MPMEM0,并且多端口存储器MPMEM0中的存储区域可以被改变为由特定端口和存储区域所占用的存储区域 多个端口。 在这样的时刻,在从端口发出请求之后,可以从其他端口提供该请求的状态。

    Remote Copy System and Method of Deciding Recovery Point Objective in Remote Copy System
    35.
    发明申请
    Remote Copy System and Method of Deciding Recovery Point Objective in Remote Copy System 有权
    远程复制系统和远程复制系统中恢复点目标的确定方法

    公开(公告)号:US20090204774A1

    公开(公告)日:2009-08-13

    申请号:US12132266

    申请日:2008-06-03

    申请人: Yoshinori Matsui

    发明人: Yoshinori Matsui

    IPC分类号: G06F12/00

    CPC分类号: G06F11/2064 G06F11/2074

    摘要: A remote copy system comprises a primary storage system having a primary volume, and a secondary storage system having a secondary volume forming a pair relationship with the primary volume. When the primary storage system receives a write command from a primary host computer, it stores the command in the primary volume and creates a journal added with time information. The secondary storage system receives the journal from the primary storage system and updates the secondary volume based on the received journal. The primary host computer determines, based on the operating status of the secondary storage system, either the time added to the latest journal that the secondary storage system received or the time added to the latest journal that updated the secondary volume as the recovery point objective, and provides the determined time this to the user.

    摘要翻译: 远程复制系统包括具有主卷的主存储系统和具有与主卷形成对关系的辅助卷的辅助存储系统。 当主存储系统从主主机接收写入命令时,它将该命令存储在主卷中,并创建添加了时间信息的日志。 辅助存储系统从主存储系统接收日志,并根据收到的日志更新次要卷。 主主机基于辅助存储系统的操作状态,确定辅助存储系统接收到的最新日志所添加的时间或添加到更新辅助卷的最新日志的时间作为恢复点目标, 并将确定的时间提供给用户。

    Memory module and memory device
    36.
    发明申请
    Memory module and memory device 有权
    内存模块和内存设备

    公开(公告)号:US20080111582A1

    公开(公告)日:2008-05-15

    申请号:US12003707

    申请日:2007-12-31

    IPC分类号: H03K19/177

    摘要: In a memory module including a plurality of DRAM chips which transmit/receive a system data signal with a predetermined data width and at a transfer rate and which transmit/receive an internal data signal having a larger data width and a lower transfer rate as compared with the system data signal, the transfer rate of the system data signal is restricted. Current consumption in DRAMs constituting the memory module is large, hindering speed increases. For this memory module, a plurality of DRAM chips are stacked on an IO chip. Each DRAM chip is connected to the IO chip by a through electrode, and includes a constitution for mutually converting the system data signal and the internal data signal in each DRAM chip by the IO chip. Therefore, wiring between the DRAM chips can be shortened, and DLL having a large current consumption may be disposed only on the IO chip.

    摘要翻译: 在包括以预定数据宽度和传送速率发送/接收系统数据信号的多个DRAM芯片的存储器模块中,并且发送/接收具有较大数据宽度和较低传送速率的内部数据信号与 系统数据信号,系统数据信号的传输速率受到限制。 构成存储器模块的DRAM的电流消耗大,阻碍速度增加。 对于该存储器模块,多个DRAM芯片堆叠在IO芯片上。 每个DRAM芯片通过贯通电极连接到IO芯片,并且包括用于通过IO芯片相互转换每个DRAM芯片中的系统数据信号和内部数据信号的结构。 因此,可以缩短DRAM芯片之间的布线,并且可以仅在IO芯片上设置具有大电流消耗的DLL。

    Mobile Terminal Device
    37.
    发明申请
    Mobile Terminal Device 有权
    移动终端设备

    公开(公告)号:US20070216760A1

    公开(公告)日:2007-09-20

    申请号:US10594147

    申请日:2005-05-17

    IPC分类号: H04N7/14

    摘要: To provide a mobile terminal device which can perform an operation reflecting the intention of a user when an event, such as the arrival of an incoming phone call or an email, occurs while a television broadcast is being displayed, and which can also improve the operability. A mobile terminal device (100) is composed of: a TV reception unit (101) which receives a television broadcast signal; an output control unit (108) which controls outputs of video and audio of the television broadcast, auxiliary information of the television broadcast, the email, audio of the phone call, and video and audio of a video phone call, to a first display unit (109a), a second display unit (109b), and an audio reproduction unit (110); a recording control unit (116) which records a television broadcast program onto a recording medium (115); a reproduction control unit (117) which reproduces the television broadcast program recorded on the recording medium (115); a control unit (119) which controls an operation performed when the email or the phone call is receives while the television broadcast is being displayed; and an unfold/fold detection unit (120) which detects whether the mobile terminal device (100) is folded or unfolded.

    摘要翻译: 为了提供一种移动终端设备,当在显示电视广播的同时,当诸如到来的电话呼叫或电子邮件等事件发生时,可以执行反映用户意图的操作,并且还可以提高可操作性 。 移动终端装置(100)包括:接收电视广播信号的电视接收单元(101) 输出控制单元(108),其将电视广播的视频和音频输出,电视广播的辅助信息,电话呼叫的音频和视频电话的视频和音频的输出控制到第一显示单元 (109a),第二显示单元(109b)和音频再现单元(110); 记录控制单元,其将电视广播节目记录到记录介质上; 再现控制单元,其再现记录在记录介质上的电视广播节目; 控制单元(119),其控制在显示电视广播时接收到电子邮件或电话呼叫时执行的操作; 以及检测移动终端装置(100)是否折叠或展开的展开/折叠检测单元(120)。

    Memory module and memory system
    38.
    发明申请
    Memory module and memory system 有权
    内存模块和内存系统

    公开(公告)号:US20060262587A1

    公开(公告)日:2006-11-23

    申请号:US11492981

    申请日:2006-07-26

    IPC分类号: G11C5/06

    摘要: In a memory module including a plurality of DRAM chips which transmit/receive a system data signal with a predetermined data width and at a transfer rate and which transmit/receive an internal data signal having a larger data width and a lower transfer rate as compared with the system data signal, the transfer rate of the system data signal is restricted. Current consumption in DRAMs constituting the memory module is large, hindering speed increases. For this memory module, a plurality of DRAM chips are stacked on an IO chip. Each DRAM chip is connected to the IO chip by a through electrode, and includes a constitution for mutually converting the system data signal and the internal data signal in each DRAM chip by the IO chip. Therefore, wiring between the DRAM chips can be shortened, and DLL having a large current consumption may be disposed only on the IO chip.

    摘要翻译: 在包括以预定数据宽度和传送速率发送/接收系统数据信号的多个DRAM芯片的存储器模块中,并且发送/接收具有较大数据宽度和较低传送速率的内部数据信号与 系统数据信号,系统数据信号的传输速率受到限制。 构成存储器模块的DRAM的电流消耗大,阻碍速度增加。 对于该存储器模块,多个DRAM芯片堆叠在IO芯片上。 每个DRAM芯片通过贯通电极连接到IO芯片,并且包括用于通过IO芯片相互转换每个DRAM芯片中的系统数据信号和内部数据信号的结构。 因此,可以缩短DRAM芯片之间的布线,并且可以仅在IO芯片上设置具有大电流消耗的DLL。

    Encryption device, decryption device, and data reproduction device
    39.
    发明申请
    Encryption device, decryption device, and data reproduction device 审中-公开
    加密装置,解密装置和数据再现装置

    公开(公告)号:US20060251246A1

    公开(公告)日:2006-11-09

    申请号:US10540477

    申请日:2004-02-18

    申请人: Yoshinori Matsui

    发明人: Yoshinori Matsui

    IPC分类号: H04L9/28

    摘要: An encrypting apparatus 100 is composed of: a file reading unit 101 which obtains a file made up of a data section (mdat) including at least one of encoded image data, audio data, text data and a header section (moov) including a header of the data section; a data encrypting unit 106 which encrypts at least one of the sets of data included in the data section of the file; a header analyzing unit 102 which analyzes the header section of the file and obtains a value of a field (EINFO) that is included in the header section to show an encoding method used for data to be encrypted by the data encrypting unit 106; a header converting unit 104 which converts the obtained value according to a predetermined conversion rule and replaces the value in the field with the converted value; and a file outputting unit 105 which outputs a file made up of a header section (moov′) including a field (EINFO′) in which the value has been replaced and a data section (encrypted mdat) including the encrypted data.

    摘要翻译: 加密装置100包括:文件读取单元101,其获取由包括编码图像数据,音频数据,文本数据和标题部分(moov)中的至少一个的数据部分(mdat)组成的文件,包括头部 的数据部分; 数据加密单元106,其对包含在文件的数据部分中的数据组中的至少一个进行加密; 标题分析单元102,其分析文件的标题部分并获得包括在标题部分中的字段值(EINFO),以显示用于由数据加密单元106加密的数据的编码方法; 标题转换单元104,其根据预定的转换规则转换所获得的值,并用转换的值替换字段中的值; 以及文件输出单元105,其输出由包括已被替换该值的字段(EINFO))和包括加密数据的数据部分(加密的mdat)的标题部分(moov')构成的文件。