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公开(公告)号：US20120206510A1
公开(公告)日：2012-08-16
申请号：US13501174
申请日：2010-06-04
CPC分类号： G09G3/3614 , G09G3/3655 , G09G2310/0267
摘要： A display device employing CC driving switches from (i) a first mode in which to carry out a display by converting resolution of a video signal by a factor of 2 in a column-wise direction to (ii) a second mode in which to carry out a display at the resolution of the video signal. During the first mode, signal potentials having the same polarity and the same gray scale are supplied to pixel electrodes included in respective two pixels that correspond to two adjacent scanning signal lines and that are adjacent to each other in the column-wise direction, and a direction of change in the signal potentials written to the pixel electrodes varies every two adjacent rows (2-line inversion driving). During the second mode, the direction of change in the signal potentials written to the pixel electrodes lines varies every single row (1-line inversion driving).
摘要翻译： 一种采用CC驱动开关的显示装置，其从（i）第一模式，其中通过将视频信号的分辨率在列方向上转换为因子2来执行显示，以（ii）携带的第二模式 以视频信号的分辨率输出显示。 在第一模式中，具有相同极性和相同灰度的信号电位被提供给包括在相应于两个相邻扫描信号线并且在列方向上彼此相邻的两个像素中的像素电极，并且 写入像素电极的信号电位的变化方向每两个相邻行（2行反转驱动）变化。 在第二模式中，写入像素电极线的信号电位的变化方向每一行变化（1行反转驱动）。
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公开(公告)号：US09218775B2
公开(公告)日：2015-12-22
申请号：US13501174
申请日：2010-06-04
CPC分类号： G09G3/3614 , G09G3/3655 , G09G2310/0267
摘要： A display device employing CC driving switches from (i) a first mode in which to carry out a display by converting resolution of a video signal by a factor of 2 in a column-wise direction to (ii) a second mode in which to carry out a display at the resolution of the video signal. During the first mode, signal potentials having the same polarity and the same gray scale are supplied to pixel electrodes included in respective two pixels that correspond to two adjacent scanning signal lines and that are adjacent to each other in the column-wise direction, and a direction of change in the signal potentials written to the pixel electrodes varies every two adjacent rows (2-line inversion driving). During the second mode, the direction of change in the signal potentials written to the pixel electrodes lines varies every single row (1-line inversion driving).
摘要翻译： 一种采用CC驱动开关的显示装置，其从（i）第一模式，其中通过将视频信号的分辨率在列方向上转换为因子2来执行显示，以（ii）携带的第二模式 以视频信号的分辨率输出显示。 在第一模式中，具有相同极性和相同灰度的信号电位被提供给包括在相应于两个相邻扫描信号线并且在列方向上彼此相邻的两个像素中的像素电极，并且 写入像素电极的信号电位的变化方向每两个相邻行（2行反转驱动）变化。 在第二模式中，写入像素电极线的信号电位的变化方向每一行变化（1行反转驱动）。
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公开(公告)号：US08970565B2
公开(公告)日：2015-03-03
申请号：US13378233
申请日：2010-03-18
CPC分类号： G11C19/28 , G09G3/3677 , G09G2310/063
摘要： A stage of the shift register has (i) a set-reset type flip-flop which receives an initialization signal and (ii) a signal generating circuit which receives a simultaneous selection signal and which generates an output signal by use of an output of the flip-flop. In at least one example embodiment, the output of the flip-flop becomes inactive regardless of whether a setting signal and a resetting signal are active or inactive, as long as the initialization signal is active. The initialization signal becomes active before the end of the simultaneous selection, and then becomes inactive after the end of the simultaneous selection. This makes it possible to stabilize operation of the shift register after the end of simultaneous selection of a plurality of signal lines carried out by the display driving circuit at a predetermined timing.
摘要翻译： 移位寄存器的一级具有（i）接收初始化信号的设置复位型触发器，以及（ii）接收同时选择信号并且通过使用输出信号产生输出信号的信号发生电路 拖鞋。 在至少一个示例性实施例中，只要初始化信号有效，触发器的输出就会变得无效，而不管设置信号和复位信号是有效还是无效。 初始化信号在同时选择结束之前变为有效，然后在同时选择结束后变为无效。 这使得可以在预定定时同时选择由显示驱动电路执行的多条信号线结束之后稳定移位寄存器的操作。
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公开(公告)号：US08223112B2
公开(公告)日：2012-07-17
申请号：US12734234
申请日：2008-08-18
CPC分类号： G11C19/28 , G09G3/20 , G09G3/3266 , G09G3/3275 , G09G3/3648 , G09G3/3674 , G09G3/3677 , G09G3/3685 , G09G3/3688 , G09G2300/0426 , G09G2310/0245 , G09G2310/0267 , G09G2310/0275 , G09G2310/0286 , G09G2310/0291
摘要： At least one embodiment of the present invention is directed to, even when external noise is applied to a shift register during all-on operation, preventing through-current from flowing in unit circuits and also to prevent increase in load on all-on control signal lines. When a high-level all-on control signal is provided to a unit circuit of a shift register, a transistor T3 is brought into off-state, so that a transistor T2 cannot output an on-voltage to a first output terminal. However, a transistor T24 is brought into on-state, so that the first output terminal outputs an on-voltage to the exterior. On the other hand, a transistor T32 is brought into on-state, so that a second output terminal outputs an off-voltage to a unit circuit 11 in the next stage. At this time, the transistor T3 is kept in off-state, so that no through-current flows to the transistors T24 and T3.
摘要翻译： 本发明的至少一个实施例涉及即使当在全导通操作期间外部噪声被施加到移位寄存器时，也可以防止在单位电路中流过电流，并且还防止全通控制信号的负载增加 线条。 当向移位寄存器的单元电路提供高电平全通控制信号时，晶体管T3进入截止状态，晶体管T2不能向第一输出端子输出导通电压。 然而，晶体管T24进入导通状态，使得第一输出端子向外部输出导通电压。 另一方面，晶体管T32进入导通状态，使得第二输出端在下一级向单元电路11输出截止电压。 此时，晶体管T3保持截止状态，使得没有贯通电流流向晶体管T24和T3。
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公开(公告)号：US20100309184A1
公开(公告)日：2010-12-09
申请号：US12734595
申请日：2008-08-20
CPC分类号： G09G3/3677 , G09G2300/0408 , G09G2300/0426 , G09G2310/0289 , G11C19/28 , H01L27/124 , H03K17/161 , H03K17/162 , H03K17/687
摘要： A circuit which is constituted by a plurality of n-channel transistors includes, in at least one embodiment, a transistor (T1) which has a drain terminal to which an input signal is supplied and a source terminal from which a output signal is supplied; and a transistor (T2) which has a drain terminal to which a control signal is supplied and a source terminal connected to a gate terminal of the transistor (T1). A gate terminal of the transistor (T2) is connected to the source terminal of the transistor (T2). With the arrangement, it is possible to provide (i) a semiconductor device which is constituted by transistors having an identical conductivity type and which is capable of reducing an influence of noise, and (ii) a display device including the semiconductor device.
摘要翻译： 在至少一个实施例中，由多个n沟道晶体管构成的电路包括具有供给输入信号的漏极端子和提供输出信号的源极端子的晶体管（T1）; 以及具有提供控制信号的漏极端子和与晶体管（T1）的栅极端子连接的源极端子的晶体管（T2）。 晶体管（T2）的栅极端子连接到晶体管（T2）的源极端子。 通过该结构，可以提供（i）由具有相同导电类型并能够减小噪声影响的晶体管构成的半导体器件，以及（ii）包括半导体器件的显示器件。
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公开(公告)号：US20100259525A1
公开(公告)日：2010-10-14
申请号：US12734234
申请日：2008-08-18
CPC分类号： G11C19/28 , G09G3/20 , G09G3/3266 , G09G3/3275 , G09G3/3648 , G09G3/3674 , G09G3/3677 , G09G3/3685 , G09G3/3688 , G09G2300/0426 , G09G2310/0245 , G09G2310/0267 , G09G2310/0275 , G09G2310/0286 , G09G2310/0291
摘要： At least one embodiment of the present invention is directed to, even when external noise is applied to a shift register during all-on operation, preventing through-current from flowing in unit circuits and also to prevent increase in load on all-on control signal lines. When a high-level all-on control signal is provided to a unit circuit of a shift register, a transistor T3 is brought into off-state, so that a transistor T2 cannot output an on-voltage to a first output terminal. However, a transistor T24 is brought into on-state, so, that the first output terminal outputs an on-voltage to the exterior. On the other hand, a transistor T32 is brought into on-state, so that a second output terminal outputs an off-voltage to a unit circuit 11 in the next stage. At this time, the transistor T3 is kept in off-state, so that no through-current flows to the transistors T24 and T3. At least one embodiment of the present invention is suitable for driver circuits or suchlike of display devices and imaging devices.
摘要翻译： 本发明的至少一个实施例涉及即使当在全导通操作期间外部噪声被施加到移位寄存器时，也可以防止贯通电流在单元电路中流动，并且还防止全导通控制信号上的负载增加 线条。 当向移位寄存器的单元电路提供高电平全通控制信号时，晶体管T3进入截止状态，晶体管T2不能向第一输出端子输出导通电压。 然而，晶体管T24进入导通状态，因此，第一输出端子向外部输出导通电压。 另一方面，晶体管T32进入导通状态，使得第二输出端在下一级向单元电路11输出截止电压。 此时，晶体管T3保持截止状态，使得没有贯通电流流向晶体管T24和T3。 本发明的至少一个实施例适用于诸如显示装置和成像装置的驱动电路等。
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37.发明授权Shift register, display-driving circuit, displaying panel, and displaying device 有权移位寄存器，显示驱动电路，显示面板和显示设备公开(公告)号：US09070471B2
公开(公告)日：2015-06-30
申请号：US13377838
申请日：2010-03-18
CPC分类号： G11C19/28 , G09G3/3677 , G09G2310/063
摘要： Provided is a shift register of a display-driving circuit which carries out simultaneous selection of a plurality of signal lines by using a simultaneous selection signal. A stage of the shift register includes (i) a set-reset type flip-flop and (ii) a signal generating circuit which generates an output signal of the stage by selectively outputting a signal in response to an output of the flip-flop. The output signal of the stage (i) becomes active due to an activation of the simultaneous selection signal and then (ii) remains active while the simultaneous selection is being performed, and the output from the flip-flop is inactive during a period in which a setting signal and a resetting signal are both being active. This makes it possible to quickly carry out the simultaneous selection of all the signal lines and the initialization of the shift register.
摘要翻译： 提供了一种显示驱动电路的移位寄存器，其通过使用同时选择信号来执行多个信号线的同时选择。 移位寄存器的一级包括（i）设置复位型触发器和（ii）信号发生电路，其通过响应于触发器的输出选择性地输出信号来产生该级的输出信号。 由于同时选择信号的激活，阶段（i）的输出信号变为有效，然后（ii）在执行同时选择时保持有效，并且触发器的输出在其中 设定信号和复位信号均处于活动状态。 这使得可以快速地执行所有信号线的同时选择和移位寄存器的初始化。
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公开(公告)号：US08675811B2
公开(公告)日：2014-03-18
申请号：US12734595
申请日：2008-08-20
IPC分类号： G11C19/00
CPC分类号： G09G3/3677 , G09G2300/0408 , G09G2300/0426 , G09G2310/0289 , G11C19/28 , H01L27/124 , H03K17/161 , H03K17/162 , H03K17/687
摘要： A circuit which is constituted by a plurality of n-channel transistors includes, in at least one embodiment, a transistor (T1) which has a drain terminal to which an input signal is supplied and a source terminal from which a output signal is supplied; and a transistor (T2) which has a drain terminal to which a control signal is supplied and a source terminal connected to a gate terminal of the transistor (T1). A gate terminal of the transistor (T2) is connected to the source terminal of the transistor (T2). With the arrangement, it is possible to provide (i) a semiconductor device which is constituted by transistors having an identical conductivity type and which is capable of reducing an influence of noise, and (ii) a display device including the semiconductor device.
摘要翻译： 在至少一个实施例中，由多个n沟道晶体管构成的电路包括具有供给输入信号的漏极端子和提供输出信号的源极端子的晶体管（T1）; 以及具有提供控制信号的漏极端子和与晶体管（T1）的栅极端子连接的源极端子的晶体管（T2）。 晶体管（T2）的栅极端子连接到晶体管（T2）的源极端子。 通过该结构，可以提供（i）由具有相同导电类型并能够减小噪声影响的晶体管构成的半导体器件，以及（ii）包括半导体器件的显示器件。
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公开(公告)号：US08269713B2
公开(公告)日：2012-09-18
申请号：US12733117
申请日：2008-05-15
IPC分类号： G09G3/36
CPC分类号： G11C19/184 , G09G3/3677 , G09G3/3688 , G09G2310/0286 , G09G2330/021
摘要： In one embodiment of the present invention, a unit circuit of a shift register includes a bootstrap circuit configured with a transistor T1, a transistor T2 and a capacitor, a transistor T3, a transistor T4, and a reset signal generation circuit. By use of two-phase clock signals and whose high level periods do not overlap with each other, the reset signal generation circuit generates a reset signal which is at a high level in a normal state and changes to a low level when an input signal turns into the high level. During a period that the reset signal is at the high level, transistors T3 and T4 perform discharge of a node and pull-down of an output signal. Thus, it is possible to obtain a power-saving shift register that fixes an output signal at a low level in a normal state without allowing a through current to flow therein.
摘要翻译： 在本发明的一个实施例中，移位寄存器的单元电路包括配置有晶体管T1，晶体管T2和电容器的晶体管T3，晶体管T4和复位信号产生电路的自举电路。 通过使用两相时钟信号并且其高电平周期彼此不重叠，复位信号产生电路产生在正常状态下处于高电平的复位信号，并且当输入信号变为低电平时变为低电平 进入高层。 在复位信号为高电平的期间，晶体管T3，T4进行节点的放电，输出信号的下拉。 因此，可以获得省电移位寄存器，其将正常状态下的输出信号固定在低电平，而不允许通流通过。
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公开(公告)号：US20120105395A1
公开(公告)日：2012-05-03
申请号：US13378233
申请日：2010-03-18
CPC分类号： G11C19/28 , G09G3/3677 , G09G2310/063
摘要： A stage of the shift register has (i) a set-reset type flip-flop which receives an initialization signal and (ii) a signal generating circuit which receives a simultaneous selection signal and which generates an output signal by use of an output of the flip-flop. In at least one example embodiment, the output of the flip-flop becomes inactive regardless of whether a setting signal and a resetting signal are active or inactive, as long as the initialization signal is active. The initialization signal becomes active before the end of the simultaneous selection, and then becomes inactive after the end of the simultaneous selection. This makes it possible to stabilize operation of the shift register after the end of simultaneous selection of a plurality of signal lines carried out by the display driving circuit at a predetermined timing.
摘要翻译： 移位寄存器的一级具有（i）接收初始化信号的设置复位型触发器，以及（ii）接收同时选择信号并且通过使用输出信号产生输出信号的信号发生电路 拖鞋。 在至少一个示例性实施例中，只要初始化信号有效，触发器的输出就会变得无效，而不管设置信号和复位信号是有效还是无效。 初始化信号在同时选择结束之前变为有效，然后在同时选择结束后变为无效。 这使得可以在预定定时同时选择由显示驱动电路执行的多条信号线结束之后稳定移位寄存器的操作。
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