Voltage dependent phase switch
    31.
    发明授权
    Voltage dependent phase switch 失效
    电压相关开关

    公开(公告)号:US3656007A

    公开(公告)日:1972-04-11

    申请号:US3656007D

    申请日:1970-09-25

    申请人: RAYMOND P MURRAY

    发明人: MURRAY RAYMOND P

    CPC分类号: G06G7/25 H03H11/18 H03H11/20

    摘要: A voltage dependent phase switch comprising a pair of transistors and a zener diode. An input signal is connected in series through the zener diode to drive the base of one of the transistors. The input signal is also connected to the base drive of an emitter follower transistor. When the input signal is negative and less in magnitude than the breakdown voltage of the zener diode then the emitter follower transistor is driven and an output signal is provided therefrom that increases linearly with increase in the input signal. However, when the input signal is negative and greater in magnitude than zener diode breakdown voltage then the transistor that is connected to the zener diode is driven and the voltage output decreases linearly with the increasing negative input voltage thereby providing a voltage dependent phase switch. In another embodiment of the invention an input signal circuit is provided which includes a DC source, a pulse generator and a sinusoidal signal generator wherein the currents are additive and provide a switching function in conjunction with the voltage dependent phase switch where the output sinusoidal signal is in-phase or 180* out of phase with the sinusoidal signal generator signal depending upon the state of the pulse generator.

    摘要翻译: 一种电压相关开关,包括一对晶体管和齐纳二极管。 输入信号通过齐纳二极管串联连接以驱动晶体管之一的基极。 输入信号也连接到射极跟随器晶体管的基极驱动器。 当输入信号为负并且幅度小于齐纳二极管的击穿电压时,则射极跟随器晶体管被驱动,并且从其提供的输出信号随着输入信号的增加而线性增加。 然而,当输入信号为负并且幅度大于齐纳二极管击穿电压时,连接到齐纳二极管的晶体管被​​驱动,并且电压输出随着负输入电压的增加而线性减小,从而提供电压相关的相位开关。 在本发明的另一实施例中,提供了一种输入信号电路,其包括DC源,脉冲发生器和正弦信号发生器,其中电流是相加的,并且与电压相关的相位开关一起提供开关功能,其中输出正弦信号为 与正弦信号发生器信号同相或180°异相,取决于脉冲发生器的状态。

    Active all-pass network for phase equalizers
    32.
    发明授权
    Active all-pass network for phase equalizers 失效
    用于相位均衡器的主动全通网络

    公开(公告)号:US3631270A

    公开(公告)日:1971-12-28

    申请号:US3631270D

    申请日:1970-12-03

    发明人: HEINEMANN JAMES J

    IPC分类号: H03H11/18 H03K1/16

    CPC分类号: H03H11/18

    摘要: An all-pass system particularly adapted for equalizing group delay distortion in wide band communication systems. Two common emitter stages having adjustable resonant circuits are arranged in parallel to receive a single input and to linearly combine the outputs of the stages. One stage is wide band and the other is frequency selective and the output of the selective stage is twice the amplitude of the wide band stage and phase inversion is provided such that the outputs of the two stages are 180* apart.

    Phase shifting circuit
    33.
    发明授权

    公开(公告)号:US3626216A

    公开(公告)日:1971-12-07

    申请号:US3626216D

    申请日:1969-04-14

    IPC分类号: H03H11/18 H03H11/22 H03F3/26

    CPC分类号: H03H11/22 H03H11/18

    摘要: From the collector and the emitter respectively of a transistor amplifier, signals with a phase difference of 180* are obtained. Upon increasing frequency the phase difference decreases due to the frequency dependence of the parameters of the transistor. By connecting the respective windings of a transformer between ground potential and the collector and the emitter respectively of a transistor amplifier, output signals with a phase difference of 180* over a wide frequency range will be obtained.

    CONTROL APPARATUS
    38.
    发明申请
    CONTROL APPARATUS 审中-公开

    公开(公告)号:US20170317682A1

    公开(公告)日:2017-11-02

    申请号:US15497648

    申请日:2017-04-26

    摘要: A control apparatus includes, for at least two-phase signals detected from a resolver excited by a carrier signal having a carrier frequency fc, a first phase shifter that shifts a phase of a first phase signal of the resolver with a pole at a frequency f1 lower than the carrier frequency fc, a second phase shifter that shifts a phase of a second phase signal of the resolver with a pole at a frequency f2 higher than the carrier frequency fc, a signal generator that generates a correction signal for canceling out an error component of the carrier signal, and a synthesizer that synthesizes the phase-shifted first phase signal, the phase-shifted second signal, and the correction signal for canceling out the error component, in order to create a phase-modulated signal that is the carrier signal being modulated at a rotation angle of a rotor of the resolver.

    Active balun circuit and transformer

    公开(公告)号:US09614498B2

    公开(公告)日:2017-04-04

    申请号:US15103403

    申请日:2014-02-26

    IPC分类号: H03H11/32 H03H11/18

    CPC分类号: H03H11/32 H03H11/18

    摘要: An active balun circuit includes a CG transistor having a source terminal thereof connected to an input terminal and a gate terminal thereof grounded, a CS transistor having a gate terminal thereof connected to the input terminal and a source terminal thereof grounded, an asymmetrical transformer, a first output terminal, and a second output terminal. The asymmetrical transformer includes a primary coil and a secondary coil. The primary coil includes a first inductor connected to the CG transistor and a second inductor connected to the CS transistor. The secondary coil includes a third inductor associated with the first inductor and a fourth inductor associated with the second inductor. The first output terminal outputs a first signal generated at the third inductor, and the second output terminal outputs a second signal generated at the fourth inductor.

    PHASE ERROR COMPENSATION CIRCUIT
    40.
    发明申请
    PHASE ERROR COMPENSATION CIRCUIT 有权
    相位误差补偿电路

    公开(公告)号:US20160301388A1

    公开(公告)日:2016-10-13

    申请号:US14806478

    申请日:2015-07-22

    发明人: John Perry Myers

    摘要: A method and system of compensating for phase error. A phase error compensation circuit is configured to generate a phase-corrected quadrature Q output signal and a corresponding phase-corrected in-phase I output signal, the circuit includes a first transconductance circuit configured to convert a voltage signal related to an I input voltage signal to an I current signal. A second transconductance circuit is configured to convert a voltage signal related to a Q input signal to a Q current signal. A first multiplier circuit is configured to multiply the Q current signal times a Q scaling constant. A second multiplier circuit is configured to multiply the I current signal times an I scaling constant. An I summer sums the I current signal with the scaled Q signal. A Q summer sums the Q current signal with the scaled I signal.

    摘要翻译: 一种补偿相位误差的方法和系统。 相位误差补偿电路被配置为产生相位校正的正交Q输出信号和对应的相位校正的同相I输出信号,该电路包括第一跨导电路,其被配置为将与I输入电压信号相关的电压信号 到I当前信号。 第二跨导电路被配置为将与Q输入信号相关的电压信号转换为Q电流信号。 第一乘法器电路被配置为将Q电流信号乘以Q缩放常数。 第二乘法器电路被配置为将I电流信号乘以I缩放常数。 I夏天用缩放的Q信号来计算I电流信号。 Q夏天与缩放的I信号相加Q电流信号。