Phase Shifter having parallel RC networks
    31.
    发明授权
    Phase Shifter having parallel RC networks 失效
    移相器具有并联RC网络

    公开(公告)号:US5043654A

    公开(公告)日:1991-08-27

    申请号:US534100

    申请日:1990-06-06

    申请人: Pascal Philippe

    发明人: Pascal Philippe

    IPC分类号: H03H7/18 H03H7/21

    CPC分类号: H03H7/21

    摘要: Phase shifter to which are applied two signals in a phase opposition (v, -v) is constituted by a first series circuit of a resistor and a capacitor (R.sub.1, C.sub.1), and a second series circuit of a resistor and a capacitor (R.sub.2, C.sub.2). So that neither the relative amplitudes nor the relative phases of all the signals used at the outputs (5, 6, 7, 8) are degraded by the impedance of the stages that follow, the phase shifter includes a first network of a resistor and a capacitor connected in parallel (C.sub.3, R.sub.3), and a second network of a resistor and a capacitor connected in parallel (C.sub.4, R.sub.4). Both the four resistors and the four capacitors of the phase shifter are each substantially equal in value.

    摘要翻译: 施加相位相对(v,-v)的两个信号的移相器由电阻器和电容器(R1,C1)的第一串联电路和电阻器和电容器的第二串联电路(R2 ,C2)。 因此,输出(5,6,7,8)中使用的所有信号的相对幅度和相对相位均不会随后续级的阻抗而降低,所以移相器包括电阻器的第一网络和 并联的电容器(C3,R3)和并联的电阻器和电容器(C4,R4)的第二网络。 移相器的四个电阻器和四个电容器的值都基本相等。

    Method and circuit for reducing effects of distributed capacitance
associated with large thin film resistors
    32.
    发明授权
    Method and circuit for reducing effects of distributed capacitance associated with large thin film resistors 失效
    减小与大薄膜电阻相关的分布电容效应的方法和电路

    公开(公告)号:US4904951A

    公开(公告)日:1990-02-27

    申请号:US203250

    申请日:1988-06-06

    CPC分类号: H03F3/45479 H03H7/18

    摘要: A technique for reducing phase shift of a signal passing through a large thin film resistor on an insulating layer includes applying a signal to one terminal of the thin film resistor and also to one end of an underlying doped epitaxial region. The opposite terminal of the thin film resistor is connected to a virtual ground or virtual reference voltage produced by an inverting input of an operational amplifier. The corresponding opposite end of the epitaxial layer is connected to ground or other reference voltage. The voltage gradients produced by currents flowing through both the thin film resistor and the epitaxial layer are equal, so that substantially no incremental charging current flows through capacitance between the thin film resistor and the epitaxial layer. Phase shift of the signal flowing through the thin film resistor is thereby avoided.

    摘要翻译: 用于减小通过绝缘层上的大薄膜电阻器的信号的相移的技术包括将信号施加到薄膜电阻器的一个端子以及下掺杂的外延区域的一端。 薄膜电阻器的相对端子连接到由运算放大器的反相输入端产生的虚拟参考电压或虚拟参考电压。 外延层的对应的相对端连接到地或其他参考电压。 通过流过薄膜电阻器和外延层的电流产生的电压梯度相等,使得基本上没有增量的充电电流流过薄膜电阻器和外延层之间的电容。 从而避免了流过薄膜电阻器的信号的相移。

    Monolithic vector modulator/complex weight using all-pass network
    33.
    发明授权
    Monolithic vector modulator/complex weight using all-pass network 失效
    整体向量调制器/使用全通网络的复数权重

    公开(公告)号:US4806888A

    公开(公告)日:1989-02-21

    申请号:US851726

    申请日:1986-04-14

    摘要: A complex weighting device contains parallel all-pass networks selectively feeding a pair of differential amplifiers, so as to produce a set of mutually orthogonal vector outputs. These outputs are coupled to an attenuator network comprised of dual gate field effect transistors for controllably attenuating the vector outputs of the differential amplifiers. The attenuated vectors are selectively combined to realize a prescribed degree of phase shift from 0.degree. to 360.degree. through the complex weight.

    摘要翻译: 复加权装置包括选择性馈送一对差分放大器的并行全通网络,以便产生一组相互正交的矢量输出。 这些输出耦合到由双栅极场效应晶体管组成的衰减器网络,用于可控地衰减差分放大器的矢量输出。 减弱的载体被选择性地组合,以通过复合重量实现从0度到360度的规定的相移程度。

    Correlated signal processor
    34.
    发明授权
    Correlated signal processor 失效
    相关信号处理器

    公开(公告)号:US4567602A

    公开(公告)日:1986-01-28

    申请号:US503574

    申请日:1983-06-13

    IPC分类号: H03H7/18 H04L27/20

    CPC分类号: H04L27/2082

    摘要: A cross-correlated baseband signal processor for providing in-phase and quadrature phase shifted NRZ signals from an input signal, apparatus for cross-correlating the in-phase and quadrature shifted signals, and apparatus for generating in-phase and quadrature shifted intersymbol-interference and jitter free (IJF) modulated output signals having amplitudes such that the vector sum of the output signals is approximately the same at virtually all phase angles of each bit period. The resultant cross-correlated bandlimited PSK signal (XPSK) has an almost constant envelope and thus it can be passed through a saturated amplifier without AM/PM and AM/AM degradation and without the need for post-amplification filtering, as there is no spectral restoration (regrowth).

    摘要翻译: 一种用于从输入信号提供同相和正交相移NRZ信号的互相关基带信号处理器,用于对相位和正交移位信号进行交叉相关的装置,以及用于产生同相和正交移位符号间干扰的装置 和无抖动(IJF)调制输出信号,其幅度使得输出信号的矢量和几乎在每个位周期的所有相位角处相同。 所得到的交叉相关带限PSK信号(XPSK)具有几乎恒定的包络,因此可以通过饱和放大器,而不需要AM / PM和AM / AM衰减,并且不需要后置放大滤波,因为没有光谱 恢复(再生长)。

    Clock pulse phase shifter
    35.
    发明授权
    Clock pulse phase shifter 失效
    时钟脉冲移相器

    公开(公告)号:US4431969A

    公开(公告)日:1984-02-14

    申请号:US324885

    申请日:1981-11-25

    CPC分类号: H03H11/20 H03H17/08

    摘要: As shown in FIG. 8, a phase shifter for phase shifting a single frequency clock signal CK as produced by an oscillator (813) comprises an inverter (805) and a delay network (804) for producing phase quadrature versions I.sub.ac, I.sub.ac and Q.sub.ac, Q.sub.ac of the signal. A current generator (803) produces control currents I.sub.c, I.sub.c and Q.sub.c, Q.sub.c, the magnitudes of which are determined by a control voltage V.sub.c whose magnitude represents a required phase shift. Two multipliers (801) and (802) multiply the signal pairs I.sub.ac, I.sub.ac and I.sub.c, I.sub.c ; and the signal pairs Q.sub.ac, Q.sub.ac and Q.sub.c, Q.sub.c, to produce resultant quadrature signals which are combined in an adder (806) to produce the phase shifted clock signal CLK (and CLK). The phase shift range is made to cover a number of cycles by an arrangement comprising two limit detectors (807) and (808), an OR-gate ( 809), a .div.2 circuit (810), and two reversing switches (811) and (812). This arrangement serves to reverse the sense of the control voltage V.sub.c at each limit of its operating range so that this range can be used successively a number of times to represent progressive phase shift. The current generator (803) can also be modified to provide control currents representing a phase shift of more than one cycle.

    摘要翻译: 如图所示。 如图8所示,用于由振荡器(813)产生的用于移相单频时钟信号CK的移相器包括用于产生信号的相位正交版本Iac,Iac和Qac,Qac的反相器(805)和延迟网络(804) 。 电流发生器(803)产生控制电流Ic,Ic和Qc,Qc,其大小由其幅度表示所需相移的控制电压Vc确定。 两个乘法器(801)和(802)乘以信号对Iac,Iac和Ic,Ic; 和信号对Qac,Qac和Qc,Qc,以产生在加法器(806)中组合以产生相移时钟信号CLK(和CLK)的合成正交信号。 相移范围通过包括两个限制检测器(807)和(808),或门(809),二维电路(810)和两个反转开关(811)的布置来覆盖多个周期, 和(812)。 这种布置用于在其操作范围的每个极限处反转控制电压Vc的感觉,使得可以连续多次使用该范围来表示逐行相移。 电流发生器(803)也可以被修改以提供表示多于一个周期的相移的控制电流。

    Shunt loaded line phase shifter
    36.
    发明授权
    Shunt loaded line phase shifter 失效
    分流负载线相移器

    公开(公告)号:US3872409A

    公开(公告)日:1975-03-18

    申请号:US46545074

    申请日:1974-04-30

    申请人: US ARMY

    发明人: HATKIN LEONARD

    IPC分类号: H01P1/185 H01P1/18 H03H7/18

    CPC分类号: H01P1/185

    摘要: A Differential Phase Shifter for operating at a center operating frequency is disclosed which includes a transmission line and a pair of shorting stubs attached thereto spaced a quarter wavelength apart at the center operating frequency. Each of the stubs are shorted at a distance greater than a quarter of a wavelength at the center operating frequency from the transmission line. A diode susceptible of being turned on or off is located on each of the stubs at a point less than a quarter of a wavelength from the main transmission line. The disclosure explains how to select the impedance values for the transmission line and the two stubs, as well as the spacing of the shorts and the diodes.

    摘要翻译: 公开了一种用于在中心工作频率下操作的差分移相器,其包括传输线和一对连接到其的中心工作频率间隔四分之一波长的短路短截线。 每根短线在传输线的中心工作频率处的距离大于四分之一波长的短路。 易于接通或断开的二极管位于距离主传输线的波长不到四分之一的点上的每个短截线上。 本公开解释了如何选择传输线和两个短截线的阻抗值以及短路和二极管的间隔。

    Variable frequency oscillator systems
    37.
    发明授权
    Variable frequency oscillator systems 失效
    可变频率振荡器系统

    公开(公告)号:US3852681A

    公开(公告)日:1974-12-03

    申请号:US29312272

    申请日:1972-09-28

    申请人: PHILIPS CORP

    发明人: UNDERHILL M

    CPC分类号: H03L7/02

    摘要: The output of an oscillator is fed into a delay line and the phase difference across the delay line is compared in a comparator which gives a d.c. signal. This d.c. signal is fed back to control the oscillator. The oscillator will normally sit at one of a number of locking frequencies spaced apart so that the delay line gives a zero phase difference but by applying a compensating d.c. signal the oscillator can be set to any intermediate frequency. A square wave pulse is used to cause the oscillator to jump in frequency to the next locking frequency.

    摘要翻译: 将振荡器的输出馈送到延迟线,并且在比较器中比较延迟线两端的相位差,该比较器产生直流。 信号。 这个d.c. 反馈信号来控制振荡器。 振荡器通常位于间隔开的多个锁定频率之一,使得延迟线给出零相位差,而是通过施加补偿直流。 信号振荡器可以设置为任何中频。 使用方波脉冲使振荡器频率跳到下一个锁定频率。

    Variable phase equalizer
    38.
    发明授权
    Variable phase equalizer 失效
    可变相平衡器

    公开(公告)号:US3706947A

    公开(公告)日:1972-12-19

    申请号:US3706947D

    申请日:1970-12-07

    申请人: RAYTHEON CO

    CPC分类号: H03H11/20 H03H7/185

    摘要: A variable phase equalizer employing a hybrid network wherein one of the pairs of opposite hybrid terminations is used as input and output and the second pair of hybrid terminations has a variable reactance in one arm and a resistance in the opposite arm. This equalizer has the advantage that its insertion loss is constant, independently of the reactive components to be varied within the range provided with no restriction on the value selected.

    摘要翻译: 使用混合网络的可变相位均衡器,其中一对相对的混合终端中的一个被用作输入和输出,并且第二对混合终端在一个臂中具有可变的电抗和相对的臂中的电阻。 该均衡器的优点在于,其插入损耗是恒定的,独立于在对所选择的值没有限制的范围内变化的无功分量。