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    Synchronization method and controller thereof
    401.
    发明授权
    Synchronization method and controller thereof 有权

    公开(公告)号：US12182358B2

    公开(公告)日：2024-12-31

    申请号：US17671621

    申请日：2022-02-15

    Applicant: NOVATEK Microelectronics Corp.

    Inventor： Shih-Ming Lin ,  Jiun-Jie Tsai

    IPC: G06F3/041 ,  G06F3/0354

    Abstract: A synchronization method between an active stylus and a touch device includes determining whether the active stylus approaches the touch device; starting a timing configuration process after the touch device receives a response signal from the active stylus; and starting a timing calibration process after the timing configuration process is completed.

    POWER CONVERTER
    402.
    发明申请
    POWER CONVERTER 有权

    公开(公告)号：US20240405673A1

    公开(公告)日：2024-12-05

    申请号：US18325223

    申请日：2023-05-30

    Applicant: NOVATEK MICROELECTRONICS CORP.

    Inventor： WEI-LING CHEN

    IPC: H02M3/156

    Abstract: A power converter includes an input, an output, a first switch, a second switch, a third switch, a fourth switch, a fifth switch, and a sixth switch. The first switch and the second switch are coupled between the input and a reference voltage. The third switch is coupled between a first capacitor and the fourth switch. The first capacitor is coupled to the reference voltage. The fourth switch is coupled between the output and the third switch. A terminal of a second capacitor is coupled between the third switch and the fourth switch, and another terminal of the second capacitor is coupled between the first switch and the second switch through an inductor. The fifth switch is coupled between the reference voltage and the common node of the inductor and the second capacitor. The sixth switch is coupled between the common node and the first capacitor.

    Gate line driver for display panel
    404.
    发明授权
    Gate line driver for display panel 有权

    公开(公告)号：US12131716B1

    公开(公告)日：2024-10-29

    申请号：US18488994

    申请日：2023-10-17

    Applicant: NOVATEK Microelectronics Corp.

    Inventor： Wei-Jen Lai ,  Jen-Hao Liao

    IPC: G09G3/36

    CPC classification number: G09G3/3677 ,  G09G2310/08 ,  G09G2330/021

    Abstract: A gate line driver is provided and includes first to second transistors and first to third switches. The first transistor and the second transistor are coupled in series between a first voltage terminal and a second voltage terminal. The first switch has a first terminal coupled to a first node between the first and second transistors. The second switch has a first terminal coupled to a third voltage terminal and a second terminal coupled to a second terminal of the first switch at a second node. The third switch has a first terminal coupled to the third voltage terminal, a second terminal coupled to the first node, and a third terminal coupled to the second node.

    Pseudo resistor with autotune function
    405.
    发明授权
    Pseudo resistor with autotune function 有权

    公开(公告)号：US12113532B2

    公开(公告)日：2024-10-08

    申请号：US18091381

    申请日：2022-12-30

    Applicant: Novatek Microelectronics Corp.

    Inventor： Chih-Yuan Chang ,  Yu-Te Liao ,  Wei Cheng Liu

    IPC: H03K3/011 ,  H03F1/08 ,  H03K5/26 ,  H03K17/56

    CPC classification number: H03K3/011 ,  H03F1/08 ,  H03K5/26 ,  H03K17/56

    Abstract: Pseudo resistor having an auto-tune function automatically calibrates resistance of the pseudo resistor and compensates for DC drift based on an output signal of an electrical circuit to which the pseudo resistor is coupled, as to mitigate signal phenomenon in the output signal caused by PVT variation. The pseudo resistor includes first transistor, second transistor, and adder. The first terminal of the second transistor is coupled to the first terminal of the first transistor and forms a first common node. The control terminal of the first transistor is coupled to the control terminal of the second transistor and forms second common node. The adder is coupled between the first and second common nodes and configured to receive adjustment voltage for generating a bias voltage for controlling the first and second transistors, where the adjustment voltage corresponds to the output signal coupled to the second terminal of the second transistor.

    Driving apparatus and operation method thereof
    406.
    发明授权
    Driving apparatus and operation method thereof 有权

    公开(公告)号：US12111996B2

    公开(公告)日：2024-10-08

    申请号：US17891149

    申请日：2022-08-19

    Applicant: Novatek Microelectronics Corp.

    Inventor： Wei-Lun Shih ,  Tsen-Wei Chang ,  Cho-Hsuan Jhang ,  Chih-Peng Hsia ,  Cheng-Yu Chiang

    IPC: G06F3/041 ,  G06V40/13

    CPC classification number: G06F3/04166 ,  G06V40/13

    Abstract: A driving apparatus and an operation method thereof are provided. The driving apparatus includes a first driving circuit and a second driving circuit. The first driving circuit suspends performing at least one of a display driving operation and a touch sensing operation during a skip period under a driving mode, and the first driving circuit performs the at least one of the display driving operation and the touch sensing operation outside the skip period under the driving mode. The second driving circuit is coupled to the first driving circuit. The second driving circuit performs a fingerprint sensing operation during the skip period.

    Driving circuit and synchronization method thereof for multi-panel display device
    407.
    发明授权
    Driving circuit and synchronization method thereof for multi-panel display device 有权

    公开(公告)号：US12106711B1

    公开(公告)日：2024-10-01

    申请号：US18481239

    申请日：2023-10-05

    Applicant: Novatek Microelectronics Corp.

    Inventor： Yen-Ju Hou ,  Yung-Yu Hsieh ,  Kai-Wen Shao

    IPC: G09G3/3208

    CPC classification number: G09G3/3208 ,  G09G2310/08 ,  G09G2330/021 ,  G09G2330/023

    Abstract: A driving circuit and a synchronization method thereof for a multi-panel display device are provided. The driving circuit includes a first driving chip and a second driving chip which share a power circuit. One of the first driving chip and the second driving chip is set as a master driving chip or a slave driving chip based on a control signal. The master driving chip transmits a power enable signal and a control signal to the power circuit, which triggers the power circuit providing power voltages to the master driving chip and the slave driving chip. When the master driving chip transmits a timing control signal to the slave driving chip, the slave driving chip performs a power synchronization operation to synchronize with the master driving chip based on the timing control signal.

    Pixel circuit of display panel
    410.
    发明公开
    Pixel circuit of display panel 审中-公开

    公开(公告)号：US20240304143A1

    公开(公告)日：2024-09-12

    申请号：US18119269

    申请日：2023-03-08

    Applicant: NOVATEK Microelectronics Corp.

    Inventor： Yi-Jiang Hu

    IPC: G09G3/3233

    CPC classification number: G09G3/3233 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2310/08 ,  G09G2320/0233

    Abstract: A pixel circuit of a display panel includes a light emitting device, a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor and a first capacitor. The first transistor includes a drain terminal, a source terminal and a gate terminal. The second transistor is coupled to a data input terminal of the pixel circuit. The third transistor is coupled to the second transistor. The fourth transistor is coupled between the second transistor and the light emitting device. The fifth transistor is coupled between the drain terminal of the first transistor and the gate terminal of the first transistor. The sixth transistor is coupled between the second transistor and the drain terminal of the first transistor. The first capacitor is coupled between the third transistor and the gate terminal of the first transistor.

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