公开(公告)号：US20220394296A1

公开(公告)日：2022-12-08

申请号：US17889580

申请日：2022-08-17

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Ryuichi KANOH ,  Tadamasa TOMA ,  Kiyofumi ABE ,  Takahiro NISHI ,  Masato OHKAWA ,  Hideo SAITOU

IPC: H04N19/60 ,  H04N19/124 ,  H04N19/176 ,  H04N19/44

Abstract: An encoder which transforms a current block to be encoded in an image to encode the current block includes circuitry and memory. The circuitry, using the memory: determines a plurality of first transform basis candidates and transforms the current block using a transform basis included in the plurality of first transform basis candidates determined, when the current block has a first size; and determines one or more second transform basis candidates different from the plurality of first transform basis candidates and transforms the current block using a transform basis included in the one or more second transform basis candidates determined, when the current block has a second size larger than the first size.

公开(公告)号：US11523191B2

公开(公告)日：2022-12-06

申请号：US17402827

申请日：2021-08-16

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Noritaka Iguchi ,  Tadamasa Toma ,  Hisaya Katou

IPC: H04N21/643 ,  H04N21/43 ,  H04L7/00 ,  H04N21/236 ,  H04N21/2381 ,  H04N21/242 ,  H04N21/262 ,  H04N21/438 ,  H04N21/61

Abstract: A transmission method includes generating one or more frames for content transfer using IP (Internet Protocol) packets, and transmitting the one or more generated frames by broadcast. Each of the one or more frames contains a plurality of second transfer units, each of the plurality of second transfer units contains one or more first transfer units, and each of the one or more first transfer units contains at least one of the IP packets. An object IP packet of the IP packets which is stored in a first transfer unit positioned at a head in the one or more frames contains reference clock information that indicates time for reproduction of the content in data structure different from data structure of an MMT (MPEG Media Transport) packet, and header compression processing on the object IP packet is omitted.

公开(公告)号：US11522590B2

公开(公告)日：2022-12-06

申请号：US17098024

申请日：2020-11-13

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Naganori Shirakata ,  Masayuki Shimizu ,  Koji Takinami

IPC: H04B7/06 ,  H04B17/23 ,  G01S3/02 ,  G01S3/74 ,  H04B17/318 ,  H04B17/20 ,  H04B7/0417 ,  H04W16/28 ,  H04W72/04 ,  H04B7/10 ,  H04B7/0408 ,  H04W88/08

Abstract: A wireless communication apparatus includes a first antenna circuit that forms a beam selected from among a plurality of first beams through a beamforming process performed for communication using a millimeter wave band and a monitor that displays a first pattern indicating a radiation direction of the selected beam.

公开(公告)号：US20220385902A1

公开(公告)日：2022-12-01

申请号：US17876925

申请日：2022-07-29

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Ryuichi KANOH ,  Tadamasa TOMA ,  Kiyofumi ABE ,  Takahiro NISHI

IPC: H04N19/119 ,  H04N19/176

Abstract: An encoder includes circuitry and memory coupled to the circuitry. The circuitry in operation: determines whether the shape of a current chroma block to be split satisfies a first condition; generates one or more second candidates for a block partitioning method by eliminating one or more predetermined candidates from a plurality of first candidates for a block partitioning method when the current chroma block satisfies the first condition; selects a block partitioning method from among the one or more second candidates; and splits the current chroma block according to the block partitioning method selected.

公开(公告)号：US20220383320A1

公开(公告)日：2022-12-01

申请号：US17886638

申请日：2022-08-12

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Naohisa NISHIDA ,  Yuji UNAGAMI

IPC: G06Q20/40 ,  G06Q20/38 ,  G06Q10/02

Abstract: A control method according to the present disclosure is control method for controlling a first node that manages a first blockchain in a first distributed ledger in a system utilized to use a service object and including the first node and a plurality of second nodes that each manage a second blockchain in a second distributed ledger. The control method includes: obtaining first transaction data; determining whether a total number of second nodes, among the plurality of second nodes, that are capable of communication exceeds a predetermined value; and generating a first block containing the first transaction data only when the total number of second nodes that are capable of communication exceeds the predetermined value.

公开(公告)号：US11515965B2

公开(公告)日：2022-11-29

申请号：US17729658

申请日：2022-04-26

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Tomohiro Kimura ,  Yutaka Murakami ,  Mikihiro Ouchi

IPC: H04L1/00 ,  H04J7/02 ,  H04L27/26 ,  H04L27/36 ,  H04L25/06 ,  H04L27/38

Abstract: A reception device includes: a receiver that receives a multiplexed signal; a first demapper that demaps the multiplexed signal, with a second modulated symbol stream of a second data series being included in the multiplexed signal as an undefined signal component, to generate a first bit likelihood stream of a first data series; a second demapper that demaps the multiplexed signal, with a first modulated symbol stream of the first data series being included in the multiplexed signal as an undefined signal component, to generate a second bit likelihood stream of the second data series; a first decoder that performs error control decoding on the first bit likelihood stream to derive the first data series; and a second decoder that performs error control decoding on the second bit likelihood stream to derive the second data series.

公开(公告)号：US20220377792A1

公开(公告)日：2022-11-24

申请号：US17771789

申请日：2020-08-31

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Yutaka MURAKAMI

IPC: H04W74/08

Abstract: This communication device has: a reception unit that receives a beacon signal through a first channel; a control unit that generates a sensing signal on the basis of information included in an extended area of the beacon signal; and a transmission unit that transmits the sensing signal through a second channel.

公开(公告)号：US20220368935A1

公开(公告)日：2022-11-17

申请号：US17865659

申请日：2022-07-15

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Takashi HASHIMOTO ,  Takahiro NISHI ,  Tadamasa TOMA ,  Kiyofumi ABE ,  Ryuichi KANOH

IPC: H04N19/513 ,  H04N19/105 ,  H04N19/176

Abstract: A decoder that decodes a current block using a motion vector includes: a processor; and memory. Using the memory, the processor: derives a first candidate vector from one or more candidate vectors of one or more neighboring blocks that neighbor the current block; determines, in a first reference picture for the current block, a first adjacent region that includes a position indicated by the first candidate vector; calculates evaluation values of a plurality of candidate regions included in the first adjacent region; and determines a first motion vector of the current block, based on a first candidate region having a smallest evaluation value among the evaluation values. The first adjacent region is included in a first motion estimation region determined based on the position indicated by the first candidate vector.

公开(公告)号：US20220368929A1

公开(公告)日：2022-11-17

申请号：US17874731

申请日：2022-07-27

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Virginie DRUGEON ,  Kiyofumi ABE ,  Takahiro NISHI ,  Tadamasa TOMA

IPC: H04N19/423 ,  H04N19/70 ,  H04N19/31

Abstract: An encoder includes circuitry and memory coupled to the circuitry. Given id indicating a lower temporal sublayer other than a highest temporal sublayer in temporal sublayers, the circuitry calculates a DPB output time [id] for a picture in the lower temporal sublayer. In doing so, the circuitry of the encoder subtracts a DPB output delta [id] provided for each of the temporal sublayers from a DPB output delay shared between the temporal sublayers, and given maxid indicating the highest temporal sublayer, calculates the DPB output delta [id] by subtracting a CPB removal delay [maxid] and an offset [id] from a CPB removal delay [id]. Next, the circuitry stores the offset [id] in a bitstream.

公开(公告)号：US11503281B2

公开(公告)日：2022-11-15

申请号：US17681051

申请日：2022-02-25

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Jing Ya Li ,  Chong Soon Lim ,  Han Boon Teo ,  Che Wei Kuo ,  Hai Wei Sun ,  Chu Tong Wang ,  Kiyofumi Abe ,  Takahiro Nishi ,  Tadamasa Toma ,  Yusuke Kato

IPC: H04N19/105 ,  H04N19/14 ,  H04N19/159 ,  H04N19/176

Abstract: An encoder includes circuitry and memory coupled to the circuitry. The circuitry, in operation: determines whether a size of a current block, which is a unit for which a vector candidate list including vector candidates is generated, is less than or equal to a threshold; when the size of the current block is less than or equal to the threshold, generates the vector candidate list by registering a history-based motion vector predictor (HMVP) vector candidate in the vector candidate list from an HMVP table without performing a first pruning process; when the size of the current block is greater than the threshold, generates the vector candidate list by performing the first pruning process and registering the HMVP vector candidate in the vector candidate list from the HMVP table; and encodes the current block using the vector candidate list.