CONTROL METHOD AND SYSTEM FOR PREVENTION OF CURRENT INVERSION IN RECTIFIERS OF SWITCHING CONVERTERS

    公开(公告)号:US20200336071A1

    公开(公告)日:2020-10-22

    申请号:US16387142

    申请日:2019-04-17

    Abstract: A method of controlling synchronous rectification transistors in a switching converter includes sensing a drain-to-source voltage across each synchronous rectification transistor each switching half-cycle of the switching converter. An average of the sensed drain-to-source voltage is calculated for each synchronous rectification transistor over N prior switching half-cycles. A load current transient in the switching converter is sensed based on the sensed drain-to-source voltage of each synchronous rectification transistor and the calculated average of the sensed drain-to-source voltage for each synchronous rectification transistor over the N prior switching half-cycles.

    INTEGRATED ELECTRONIC DEVICE COMPRISING A TEMPERATURE SENSOR AND SENSING METHOD

    公开(公告)号:US20200333197A1

    公开(公告)日:2020-10-22

    申请号:US16921819

    申请日:2020-07-06

    Abstract: A method of sensing a temperature includes providing a voltage to reverse bias a PN junction of a junction diode. The PN junction has a junction capacitance. The method includes providing a reverse bias voltage change across the PN junction and detecting a value of the junction capacitance in response to the reverse bias voltage change. The value of the junction capacitance is a function of a temperature of the PN junction. An output signal is generated based on the detected junction capacitance, where the output signal indicates a temperature of an environment containing the junction diode.

    Method of real-time access to a differential memory, differential memory and electronic system

    公开(公告)号:US10811093B2

    公开(公告)日:2020-10-20

    申请号:US16225492

    申请日:2018-12-19

    Abstract: In an embodiment, a method of accessing logic data stored in a differential memory using single-ended mode includes: storing second logic data in an auxiliary memory module of the differential memory by copying first logic data stored in a first main memory module of the differential memory into the auxiliary memory module; refreshing the first logic data; receiving a request for reading the first logic data; when refreshing the first logic data, fetching the second logic data when refreshing the first logic data in response to the request for reading the first logic data; and when not refreshing the first logic data, fetching the first logic data in response to the request for reading the first logic data.

    Self-test method, corresponding circuit and device

    公开(公告)号:US10809862B2

    公开(公告)日:2020-10-20

    申请号:US16523302

    申请日:2019-07-26

    Abstract: A touchscreen resistive sensor includes a network of resistive sensor branches coupled to a number of sensor nodes arranged at touch locations of the touchscreen. A test sequence is performed by sequentially applying to each sensor node a reference voltage level, jointly coupling to a common line the other nodes, sensing a voltage value at the common line, and declaring a short circuit condition as a result of the voltage value sensed at the common line reaching a short circuit threshold. A current value level flowing at the sensor node to which the reference voltage level is applied is sensed and a malfunction of the resistive sensor branch coupled with the sensor node to which a reference voltage level is applied is generated as a result of the current value sensed at the sensor node reaching an upper threshold or lower threshold.

    Light source response compensation for light projection system using a graphics processing unit

    公开(公告)号:US10805583B2

    公开(公告)日:2020-10-13

    申请号:US16585751

    申请日:2019-09-27

    Abstract: A light projection system includes a GPU that receives video data containing video images, defines a two-dimensional grid (each element of which represents a position of a light beam at a different time), designates which elements of the two-dimensional grid correspond to positions of the light beam in a designated area, designates which elements correspond to positions of the light beam outside of the designated area with some positions outside being designated as calibration positions, maps each element corresponding to positions in the designated area to a corresponding pixel of a frame of a video image, and maps elements corresponding to calibration positions to calibration pixels. An ASIC receives the mapped pixels and mapped calibration pixels from the GPU, and generates a beam position control signal therefrom. A controller controls a movable mirror based on the beam position control signal.

    ELECTRICALLY CONFINED BALLISTIC DEVICES AND METHODS

    公开(公告)号:US20200321457A1

    公开(公告)日:2020-10-08

    申请号:US16376482

    申请日:2019-04-05

    Abstract: Embodiments are directed to electrically confined ballistic devices, circuits, and networks. One such device includes a heterostructure that has a first semiconductor layer, a second semiconductor layer, and a two-dimensional electrode gas (2DEG) layer between the first and second semiconductor layers. The device further includes an input electrode electrically coupled to the 2DEG layer and an output electrode electrically coupled to the 2DEG layer. A first confinement electrode is positioned on the heterostructure. The first confinement electrode, in use, generates first space charge regions which at least partially define a boundary of the ballistic device within the 2DEG layer between the input electrode and the output electrode in response to a first voltage.

    METHOD OF MANUFACTURING LEADFRAMES FOR SEMICONDUCTOR DEVICES, CORRESPONDING LEADFRAME AND SEMICONDCTOR DEVICE

    公开(公告)号:US20200321274A1

    公开(公告)日:2020-10-08

    申请号:US16837565

    申请日:2020-04-01

    Inventor: Pierangelo MAGNI

    Abstract: Leadframes for semiconductor devices are manufactured by providing a laminar substrate of laser direct structuring material, the laminar substrate comprising first and second opposed surfaces, applying laser beam processing to the substrate to provide a first pattern of electrically-conductive formations at the first surface, a second pattern of electrically-conductive formations at the second surface and electrically-conductive vias through the substrate between the first surface and the second surface. Electrically-conductive material is formed, for instance via electrolytic or electroless growth of electrically-conductive material such a copper onto the first and second pattern of electrically-conductive formations as well as onto the electrically-conductive vias provided by applying laser beam processing to the substrate. The electrically-conductive vias are coupled to one or both of the electrically-conductive formations in the first pattern of electrically-conductive formations and the second pattern of electrically-conductive formations.

    CONVOLUTIONAL NETWORK HARDWARE ACCELERATOR DEVICE, SYSTEM AND METHOD

    公开(公告)号:US20200310758A1

    公开(公告)日:2020-10-01

    申请号:US16833353

    申请日:2020-03-27

    Abstract: A Multiple Accumulate (MAC) hardware accelerator includes a plurality of multipliers. The plurality of multipliers multiply a digit-serial input having a plurality of digits by a parallel input having a plurality of bits by sequentially multiplying individual digits of the digit-serial input by the plurality of bits of the parallel input. A result is generated based on the multiplication of the digit-serial input by the parallel input. An accelerator framework may include multiple MAC hardware accelerators, and may be used to implement a convolutional neural network. The MAC hardware accelerators may multiple an input weight by an input feature by sequentially multiplying individual digits of the input weight by the input feature.

    Photonic Devices and Methods for Formation Thereof

    公开(公告)号:US20200310031A1

    公开(公告)日:2020-10-01

    申请号:US16365566

    申请日:2019-03-26

    Inventor: Mark Andrew Shaw

    Abstract: A method of forming a photonic device includes forming a cavity extending from a first major surface of a semiconductor wafer, performing a laser grooving process to form a first groove and a second groove, dicing the semiconductor wafer along the first groove and the second groove, and attaching an optical interposer to the bottom surface of the cavity. The cavity includes a first sidewall, an opposite second sidewall, and a bottom surface. The first groove is separated from the second groove by the cavity. The dicing passes through the cavity along a line connecting the first groove to the second groove.

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