Abstract:
A multi-meter for a test probe includes a main body, two test probes and a clamping means. The test probe includes a test pin, a connecting portion, and a lead electrically connected between the test pin and the connecting portion. The connecting portion is inserted into the main body and electrically thereto. The clamping means comprises a liftable cover and a clamping portion formed on the liftable cover. One end of the liftable cover is pivotally connected to the main body. The clamping portion is configured to clamp the test pin. By this structure, the test pin is clamped by the camping portion to help a user carrying out the measurement.
Abstract:
Disclosed is an apparatus used in an electronic device for providing haptic feedback. The apparatus includes a holder having a pair fastening holes, a piezoelectric vibrator having a first though holes, a terminal with a second though hole mounted on the piezoelectric vibrator and electrically connected to the piezoelectric vibrator, and a pair of fixing portions fixing the terminal and the piezoelectric vibrator on the holder though the second though hole of the terminal, a first though holes of the piezoelectric vibrator and the fastening holes of the holder. The fixing portions fix the terminal and piezoelectric vibrator on the holder, which makes the assembling process much easier.
Abstract:
An internal clock gating apparatus comprises a static logic block and a domino logic block. The static logic block is configured to receive a clock signal and a clock enable signal. The domino logic block is configured to receive the clock signal and a control signal from an output of the static logic block. The static logic block and the domino logic block are further configured such that an output of the domino logic block generates a signal similar to the clock signal in phase when the clock enable signal has a logic high state. On the other hand, the output of the domino logic block generates a logic low signal when the clock enable signal has a logic low state. Furthermore, the static logic block and the domino logic block can reduce the setup time and delay time of the internal clock gating apparatus respectively.
Abstract:
A solid oxide cell obtainable by a process comprising the steps of: depositing a fuel electrode layer on a fuel electrode support layer; depositing an electrolyte layer comprising stabilized zirconia on the fuel electrode layer to provide an assembly of fuel electrode support, fuel electrode and electrolyte; optionally sintering the assembly of fuel electrode support, fuel electrode and electrolyte together to provide a pre-sintered half cell; depositing on the electrolyte layer of the pre-sintered half cell one or more oxygen electrode layers, at least one of the oxygen electrode layers comprising a composite of lanthanum-strontium-manganite and stabilized zirconia to provide a complete solid oxide cell; sintering the oxygen electrode layers together with the pre-sintered half cell to provide a sintered complete solid oxide cell; and impregnating the one or more oxygen electrode layers of the sintered complete solid oxide cell with manganese to obtain a manganese impregnated solid oxide cell.
Abstract:
A test system includes a testing power supply unit which includes a rectifier and filter circuit and a voltage output circuit, a dropping voltage circuit which includes a primary coil and a secondary coil, a PWM regulator, and a control circuit. The rectifier and filter circuit receives an AC voltage and converts the AC voltage into a square wave signal. The primary coil is connected to the rectifier and filter circuit and receives the square wave signal. The secondary coil is connected to the voltage output circuit. The PWM regulator is connected to the primary coil. The PWM regulator generates a pulse signal to turn on and turn off the primary coil periodically. The control circuit is connected to the PWM regulator. The control circuit controls a duty cycle of the pulse signal to adjust time of the primary coil being on in a cycle.
Abstract:
A system for displaying image is provided. The system includes a pixel unit coupled to a source driver and including a first switch, a second switch, a first capacitor, a second capacitor, a driving transistor, and a luminiferous device. The first switch includes a first control terminal receiving a first scan signal, a first terminal receiving a first operation voltage, and a second terminal. The second switch includes a second control terminal receiving a second scan signal, a third terminal, and a fourth terminal coupled to the source driver. The first capacitor is coupled between the first and the second terminals. The second capacitor is coupled between the second and the third terminals. The driving transistor includes a gate coupled to the second terminal, a source receiving the first operation voltage, and a drain. The luminiferous device is coupled to the drain and receiving a second operation voltage.
Abstract:
Novel organisms, including DNA construct host cell combinations, are disclosed. The organisms comprise a transcription unit (e.g. operon) comprising DNA sequences encoding for enzymes which promote the supply of single carbon units for the conversion of dUMP to dTMP. Examples include: dihydrofolate reductase genes e.g. T4 frd; Serine Hydroxymethyltransferase genes e.g. glyA; 3-phosphoglycerate dehydrogenase genes e.g. serA; and THF synthase genes e.g. ADE3. The organisms are used in a biological method of producing thymidine with significantly reduced levels of uridine.
Abstract:
In a capacitance sensing analog circuit of a touch panel sensing circuit, by raising a magnitude of a current flowing through a sensing capacitor to form an amplified sensing capacitance, while sensing the amplified sensing capacitance with the aid of pulse width modulation signals, higher resolution of the original sensing capacitance may thus be achieved. Besides, by using a self-calibrating capacitance sensing circuit on the touch panel sensing circuit, linear errors and DC errors of an output signal of the capacitance sensing analog circuit may be filtered off, and thereby resolution of a capacitance amplifying ratio may be effectively raised so as to relieve errors within the capacitance amplifying ratio caused by noises.
Abstract:
For further reducing power consumption of a color sequential display, a frame rate or a field rate is reduced according to conditions, which include whether a received frame is dynamic or static and whether a backlight mode is activated, for reducing power consumption. Besides, images may be outputted in forms of color images or of grey levels selectively so as to reduce an amount of processed data and related data transmission.
Abstract:
In a manufacturing method of a printed circuit board, a rigid substrate having a rigid-board metal layer is provided, an open slot is formed on the rigid substrate, and a flexible substrate is installed in the open slot, and the flexible substrate and the rigid substrate are securely bonded, and an increased-layer circuit layer is formed after electric circuits are manufactured on the rigid-board and flexible-board metal layers, and stacked on the rigid substrate and on an adjacent block where the flexible substrate is coupled to the rigid substrate, and an electric circuit is manufactured, and the increased-layer circuit layer is provided for electrically connecting and conducting the rigid and flexible substrates to overcome the issue of alignment errors.