公开(公告)号：US11588353B2

公开(公告)日：2023-02-21

申请号：US17461305

申请日：2021-08-30

Applicant: STMicroelectronics (Grand Ouest) SAS ,  STMicroelectronics S.r.l.

Inventor： Lionel Cimaz ,  Antonio Borrello ,  Simone Ludwig Dalla Stella

IPC: H02J50/12 ,  H04B5/00

Abstract: The present disclosure relates to a device comprising an inductive element and a first capacitive element series connected between a first node and a second node, a first MOS transistor connected between the first node and a third node configured to receive a reference potential, the second node being coupled directly or via a second MOS transistor to the third node, a second capacitive element connected between a fourth node and an interconnection node between the first capacitive element and the inductive element, a current generator configured to provide an AC current to the fourth node, and a switch connected between the fourth node and the third node.

公开(公告)号：US20220318392A1

公开(公告)日：2022-10-06

申请号：US17657027

申请日：2022-03-29

Applicant: STMicroelectronics (Alps) SAS ,  STMicroelectronics (Grand Ouest) SAS

Inventor： Franck Albesa ,  Nicolas Anquet

IPC: G06F21/57 ,  G06F21/60 ,  G06F9/4401

Abstract: The present disclosure relates to a method for booting a processing device, the method including: generating, by a monotonic counter and during a first boot phase, a first count value; transmitting, by the monotonic counter, the first count value to an access control circuit of a memory; reading, on the basis of the first count value, first data stored in the memory; and generating, by the monotonic counter and during a second boot phase, a second count value greater than the first count value. The access control circuit of the memory is configured so that the reading of the first data is not authorized on the basis of the second count value.

公开(公告)号：US20220209947A1

公开(公告)日：2022-06-30

申请号：US17553481

申请日：2021-12-16

Applicant: STMicroelectronics (Rousset) SAS ,  STMicroelectronics (Grand Ouest) SAS

Inventor： Julien COUVRAND ,  William ORLANDO

IPC: H04L9/08

Abstract: The present description concerns an electronic system including one or a plurality of first microprocessors, a second microprocessor for securely managing first encryption keys of the first microprocessors, the second microprocessor being configured to communicate with each first microprocessor and including a first non-volatile memory having at least one second key stored therein, and for each first microprocessor, a second non-volatile memory external to the second microprocessor and containing the first keys of the first microprocessor encrypted with the second key.

公开(公告)号：US20220147319A1

公开(公告)日：2022-05-12

申请号：US17582748

申请日：2022-01-24

Applicant: STMicroelectronics (Grand Ouest) SAS

Inventor： Frederic Ruelle

IPC: G06F7/58

Abstract: In an embodiment a method for generating a random number includes selecting, by a first object, first symbols from an entropy pool of the first object, wherein the first object is an object of a group of mutually connected objects which are substantially identical, and wherein the entropy pool is fed with second symbols by objects of the group of mutually connected objects, applying, by the first object, a hash function to the first symbols to generate a random seed and generating, by the first object, the random number from the random seed.

公开(公告)号：US11250808B2

公开(公告)日：2022-02-15

申请号：US16858397

申请日：2020-04-24

Applicant: STMicroelectronics (Grand Ouest) SAS ,  STMicroelectronics S.r.l.

Inventor： Alessandro Vittorio Galluzzi ,  Mustapha Ghanmi

IPC: G09G5/00

Abstract: A display system comprises a processing circuit configured to receive image data from a video source, and generate a current image frame by generating pixel data as a function of the image data and storing the pixel data to a frame buffer. A graphic video driver is configured to display the image frame by reading the pixel data from the frame buffer and generating drive signals for the graphic display as a function of the pixel data read. The processing circuit also is configured to insert integrity data into the pixel data of the current image frame, wherein the position of the integrity data within the pixel data changes. The display system comprises a further processing circuit configured to read the pixel data from the frame buffer and verify whether the position of the integrity data within the pixel data changes.

公开(公告)号：US20210157668A1

公开(公告)日：2021-05-27

申请号：US16953993

申请日：2020-11-20

Applicant: STMicroelectronics (Rousset) SAS ,  STMicroelectronics (Alps) SAS ,  STMicroelectronics (Grand Ouest) SAS

Inventor： Loic Pallardy ,  Nicolas Anquet ,  Dragos Davidescu

IPC: G06F11/07 ,  G06F13/42 ,  G06F21/44

Abstract: In an embodiment a system on chip includes a plurality of microprocessors, a plurality of slave resources, an interconnection circuit coupled between the microprocessors and the slave resources, the interconnection circuit configured to route transactions between the microprocessors and the slave resources and a processing controller configured to allow a user of the system to implement within the system at least one configuration diagram of the system defined by a set of configuration pieces of information used to define an assignment of at least one microprocessor to at least some of the slave resources, select the at least one microprocessors, and authorise an external debugging tool to access, for debugging purposes, only the slave resources assigned to the at least one microprocessor.

公开(公告)号：US20210124707A1

公开(公告)日：2021-04-29

申请号：US17075296

申请日：2020-10-20

Applicant: STMicroelectronics (Grand Ouest) SAS

Inventor： Amelie Delaunay

IPC: G06F13/40 ,  G06F13/42

Abstract: An electronic device includes a connector (e.g., a USB connector), a first element configured to operate the connector as a host device connector, a second element configured to operate the connector as a peripheral device connector, and a third element configured to generate a first signal upon connection of the connector. The first signal is indicative of whether the device is to operate as a host device or a peripheral device.

公开(公告)号：US20210064567A1

公开(公告)日：2021-03-04

申请号：US17003764

申请日：2020-08-26

Applicant: STMicroelectronics (Grand Ouest) SAS

Inventor： Yves Magnaud

IPC: G06F13/42 ,  G06F13/24 ,  G06F9/30 ,  G06F9/48 ,  G06F1/04

Abstract: The present disclosure relates to a communication method by I2C bus between a emitting device and a receiving device, in which: a rising edge of a clock signal of the I2C bus, directly following a start condition of an I2C communication, is recorded; and when an interruption is generated within the receiving device, the receiving device verifies whether the rising edge was recorded.

公开(公告)号：US20210044207A1

公开(公告)日：2021-02-11

申请号：US16983856

申请日：2020-08-03

Applicant: STMicroelectronics (Grand Ouest) SAS

Inventor： Lionel Cimaz

IPC: H02M3/158 ,  H02M1/08

Abstract: An embodiment DC to DC conversion circuit comprises a DC to DC converter and a regulation circuit. The regulation circuit comprises a comparator configured to detect, during a discharge phase of the DC to DC converter, an overshoot period during which an output voltage of the DC to DC converter exceeds a target voltage, and a timer configured to measure a duration of the overshoot period.

公开(公告)号：US20190115833A1

公开(公告)日：2019-04-18

申请号：US16160446

申请日：2018-10-15

Applicant: STMicroelectronics (Grand Ouest) SAS

Inventor： Christophe Belet

IPC: H02M3/158 ,  H02J7/00 ,  G01R31/40

Abstract: A USB Type-C device supporting a bidirectional power supply, includes: a first device terminal configured to be coupled to a second USB Type-C device; a second device terminal configured to be coupled to a rechargeable DC voltage power source; and a reversible switched-mode power supply coupled to the first device terminal and the second device terminal.