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    Data object profiling during program execution
    41.
    发明授权
    Data object profiling during program execution 失效
    程序执行期间的数据对象分析

    公开(公告)号：US08661222B2

    公开(公告)日：2014-02-25

    申请号：US13230859

    申请日：2011-09-13

    Applicant: Yaakov Yaari

    Inventor： Yaakov Yaari

    IPC: G06F12/02

    CPC classification number: G06F11/3471 ,  G06F12/0292

    Abstract: Systems and methods for identifying objects generated during program execution are provided. In one embodiment, the method comprises examining one or more data structures that include information about allocation of memory space to one or more objects; determining address space allocated to at least one of said objects based on examining said data structure; populating a reverse object map based on the examining of the one or more data structures and the determining of the address space allocated to said objects, such that one or more addresses in memory are associated with an object instantiated during program execution; and determining identity of a target object accessed during program execution in association with a respective address, in response to evaluating the respective address against the reverse object map to find the target object.

    Abstract translation: 提供了用于识别在程序执行期间生成的对象的系统和方法。 在一个实施例中，该方法包括检查包括关于向一个或多个对象分配存储器空间的信息的一个或多个数据结构; 基于检查所述数据结构确定分配给所述对象中的至少一个的地址空间; 基于对所述一个或多个数据结构的检查和确定分配给所述对象的地址空间来填充反向对象图，使得存储器中的一个或多个地址与在程序执行期间被实例化的对象相关联; 以及响应于针对所述反向对象图评估相应地址以找到所述目标对象，确定与相应地址相关联的在程序执行期间访问的目标对象的身份。

    Test Selection
    42.
    发明申请
    Test Selection 有权
    测试选择

    公开(公告)号：US20140025997A1

    公开(公告)日：2014-01-23

    申请号：US13552665

    申请日：2012-07-19

    Applicant: Andre Heiper ,  Aharon Kupershtok ,  Yaakov Yaari

    Inventor： Andre Heiper ,  Aharon Kupershtok ,  Yaakov Yaari

    IPC: G06F11/36

    CPC classification number: G06F11/3676

    Abstract: Computer-implemented method, computerized apparatus and a computer program product for test selection. The computer-implemented method comprising: obtaining a test suite comprising a plurality of tests for a Software Under Test (SUT); and selecting a subset of the test suite, wherein the subset provides coverage of the SUT that correlates to a coverage by a workload of the SUT, wherein the workload defines a set of input events to the SUT thereby defining portions of the SUT that are to be invoked during execution.

    Abstract translation: 计算机实现的方法，计算机化设备和用于测试选择的计算机程序产品。 该计算机实现的方法包括：获得包括用于被测软件（SUT）的多个测试的测试套件; 以及选择所述测试套件的子集，其中所述子集提供与所述SUT的工作负载相关联的所述SUT的覆盖，其中所述工作负载定义到所述SUT的一组输入事件，从而定义所述SUT的部分， 在执行期间被调用。

    Performance optimization based on data accesses during critical sections
    43.
    发明授权
    Performance optimization based on data accesses during critical sections 失效
    基于关键部分的数据访问进行性能优化

    公开(公告)号：US08612952B2

    公开(公告)日：2013-12-17

    申请号：US12755440

    申请日：2010-04-07

    Applicant: Rachel Tzoref ,  Moshe Klausner ,  Aharon Kupershtok ,  Yousef Shajrawi ,  Yaakov Yaari

    Inventor： Rachel Tzoref ,  Moshe Klausner ,  Aharon Kupershtok ,  Yousef Shajrawi ,  Yaakov Yaari

    IPC: G06F9/45

    CPC classification number: G06F11/3471 ,  G06F11/3409 ,  G06F2201/865

    Abstract: Detecting optimization opportunities is enabled by utilizing a trace of a target concurrent computer program and determining a relation between data objects accessed during the tracked execution. The relation may be stored in a Temporal Relation Graph (TRG), in an extended-TRG or another data structure. The relation may be affected by temporally-adjacent accesses to data objects. The relation may further be affected by accesses to data objects performed during critical sections of the target program.

    Abstract translation: 通过利用目标并发计算机程序的跟踪并确定在跟踪执行期间访问的数据对象之间的关系，可以实现检测优化机会。 关系可以存储在时间关系图（TRG）中，在扩展TRG或其他数据结构中。 关系可能受时间上相邻的数据对象访问的影响。 该关系可能进一步受到对在目标程序的关键部分期间执行的对数据对象的访问的影响。

    Detecting and optimizing false sharing
    46.
    发明授权
    Detecting and optimizing false sharing 失效
    检测和优化虚假共享

    公开(公告)号：US08479055B2

    公开(公告)日：2013-07-02

    申请号：US12780904

    申请日：2010-05-16

    Applicant: Daniel Citron ,  Moshe Klausner ,  Aharon Kupershtok ,  Yousef Shajrawi ,  Yaakov Yaari

    Inventor： Daniel Citron ,  Moshe Klausner ,  Aharon Kupershtok ,  Yousef Shajrawi ,  Yaakov Yaari

    IPC: G06F11/00 ,  G06F13/00

    CPC classification number: G06F11/3466 ,  G06F11/3404 ,  G06F11/3447 ,  G06F12/0815 ,  G06F2201/865

    Abstract: Systems and methods for cache optimization are provided. The method comprises tracing objects instantiated during execution of a program code under test according to type of access by one or more threads running in parallel, wherein said tracing provides information about order in which different instances of one or more objects are accessed by said one or more threads and whether the type of access is a read operation or a write operation; and utilizing tracing information to build a temporal relationship graph (TRG) for the accessed objects, wherein the objects are represented by nodes in the TRG and at least two types of edges for connecting the nodes are defined.

    Abstract translation: 提供了缓存优化的系统和方法。 该方法包括根据由并行运行的一个或多个线程的访问类型来跟踪在执行被测程序代码期间实例化的对象，其中所述跟踪提供关于一个或多个对象的不同实例被所述一个或多个对象访问的顺序的信息， 更多线程以及访问类型是读操作还是写操作; 并且利用跟踪信息为所访问的对象建立时间关系图（TRG），其中所述对象由所述TRG中的节点表示，并且用于连接所述节点的至少两种类型的边缘被定义。

    Method and Apparatus for Unpacking Packed Data
    47.
    发明申请
    Method and Apparatus for Unpacking Packed Data 审中-公开
    打包数据的方法和装置

    公开(公告)号：US20130124830A1

    公开(公告)日：2013-05-16

    申请号：US13730841

    申请日：2012-12-29

    Applicant: Alexander Peleg ,  Yaakov Yaari ,  Millind Mittal ,  Larry M. Mennemeier ,  Benney Eitan

    Inventor： Alexander Peleg ,  Yaakov Yaari ,  Millind Mittal ,  Larry M. Mennemeier ,  Benney Eitan

    IPC: G06F9/30

    CPC classification number: G06F9/30036 ,  G06F7/49921 ,  G06F9/30025 ,  G06F9/30032 ,  G06F9/30109 ,  G06F9/3013 ,  G06F9/30145 ,  G06F9/30149 ,  G06F9/30167 ,  G06F9/30181 ,  G06F9/30192 ,  G06F9/30196

    Abstract: An apparatus includes an instruction decoder, first and second source registers and a circuit coupled to the decoder to receive packed data from the source registers and to unpack the packed data responsive to an unpack instruction received by the decoder. A first packed data element and a third packed data element are received from the first source register. A second packed data element and a fourth packed data element are received from the second source register. The circuit copies the packed data elements into a destination register resulting with the second packed data element adjacent to the first packed data element, the third packed data element adjacent to the second packed data element, and the fourth packed data element adjacent to the third packed data element.

    Abstract translation: 一种装置包括指令解码器，第一和第二源寄存器以及耦合到解码器的电路，用于从源寄存器接收压缩数据，并根据解码器接收到的解包指令对打包数据进行解包。 从第一源寄存器接收第一打包数据元素和第三打包数据元素。 从第二源寄存器接收第二打包数据元素和第四打包数据元素。 所述电路将打包的数据元素复制到目的地寄存器中，其中与第一打包数据元素相邻的第二打包数据元素，与第二打包数据元素相邻的第三打包数据元素以及与第三打包数据元素相邻的第四打包数据元素 数据元素。

    Method and Apparatus for Unpacking and Moving Packed Data
    48.
    发明申请
    Method and Apparatus for Unpacking and Moving Packed Data 有权
    打包和移动打包数据的方法和装置

    公开(公告)号：US20130117547A1

    公开(公告)日：2013-05-09

    申请号：US13730837

    申请日：2012-12-29

    Applicant: Alexander Peleg ,  Yaakov Yaari ,  Millind Mittal ,  Larry M. Mennemeier ,  Benny Eitan

    Inventor： Alexander Peleg ,  Yaakov Yaari ,  Millind Mittal ,  Larry M. Mennemeier ,  Benny Eitan

    IPC: G06F9/30

    CPC classification number: G06F9/30036 ,  G06F7/49921 ,  G06F9/30025 ,  G06F9/30032 ,  G06F9/30109 ,  G06F9/3013 ,  G06F9/30145 ,  G06F9/30149 ,  G06F9/30167 ,  G06F9/30181 ,  G06F9/30192 ,  G06F9/30196

    Abstract: An apparatus includes an instruction decoder, first and second source registers and a circuit coupled to the decoder to receive packed data from the source registers and to unpack the packed data responsive to an unpack instruction received by the decoder. A first packed data element and a third packed data element are received from the first source register. A second packed data element and a fourth packed data element are received from the second source register. The circuit copies the packed data elements into a destination register resulting with the second packed data element adjacent to the first packed data element, the third packed data element adjacent to the second packed data element, and the fourth packed data element adjacent to the third packed data element.

    Abstract translation: 一种装置包括指令解码器，第一和第二源寄存器以及耦合到解码器的电路，用于从源寄存器接收压缩数据，并根据解码器接收到的解包指令对打包数据进行解包。 从第一源寄存器接收第一打包数据元素和第三打包数据元素。 从第二源寄存器接收第二打包数据元素和第四打包数据元素。 所述电路将打包的数据元素复制到目的地寄存器中，其中与第一打包数据元素相邻的第二打包数据元素，与第二打包数据元素相邻的第三打包数据元素以及与第三打包数据元素相邻的第四打包数据元素 数据元素。

    Iterative Compilation Supporting Entity Instance-Specific Compiler Option Variations
    50.
    发明申请
    Iterative Compilation Supporting Entity Instance-Specific Compiler Option Variations 审中-公开
    迭代编译支持实体实例特定编译器选项变化

    公开(公告)号：US20090193402A1

    公开(公告)日：2009-07-30

    申请号：US12020586

    申请日：2008-01-28

    Applicant: Guy Bashkansky ,  Gad Haber ,  Yaakov Yaari ,  Marcel Zalmanovici

    Inventor： Guy Bashkansky ,  Gad Haber ,  Yaakov Yaari ,  Marcel Zalmanovici

    IPC: G06F9/45

    CPC classification number: G06F8/443

    Abstract: Optimizing a computer program by setting a first compiler optimization configuration for a first entity of a computer program, setting a second compiler optimization configuration for a second entity of the computer program, where the first and second entities are of the same type and where the first and second compiler optimization configurations differ, and compiling the computer program in accordance with the compiler optimization configurations, thereby creating a compiled program.

    Abstract translation: 通过为计算机程序的第一实体设置第一编译器优化配置来优化计算机程序，为计算机程序的第二实体设置第二编译器优化配置，其中第一和第二实体具有相同类型，并且第一 和第二编译器优化配置不同，并根据编译器优化配置编译计算机程序，从而创建一个编译程序。

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