Abstract:
An integrated control circuit according to aspects of the present invention includes a capacitor to develop a first current during a first time duration in response to a charge current and to develop a second voltage during a second time duration in response to a discharge current. A comparator is also included and is coupled to the capacitor to indicate when the voltage on the capacitor reaches the second voltage. A control logic sets a duty ratio of a periodic output signal in response to the time it takes the capacitor to discharge from the first voltage to the second voltage. An oscillator is coupled to provide a timing signal to the control logic. In one aspect, the control logic includes an output that is coupled to the oscillator to change a frequency of the oscillator.
Abstract:
An apparatus and method of providing a pulse width modulated signal that is responsive to a current are disclosed. A circuit according to aspects of the present invention includes a capacitor to convert a first current to a first voltage on the capacitor during a first time duration and to discharge a second current from the capacitor to change the first voltage to a second voltage during a second time duration. A comparator is also included and is coupled to an output of the capacitor to compare a voltage on the capacitor to a reference voltage during the second time duration to change a pulse width of a periodic output signal in response to an input current.
Abstract:
An example power supply controller includes a regulation circuit, a current sense circuit, and a response circuit. The regulation circuit is coupled to regulate a sense terminal to a voltage level. The current sense circuit is coupled to the sense terminal to sense a current through the sense terminal a measurement delay period after a magnitude of the current through the sense terminal reaches a first threshold current level. The response circuit is coupled to the sense circuit and is responsive to the current through the sense terminal only after the measurement delay period.
Abstract:
A sample and hold circuit in one aspect includes first and second switches. The first switch can be coupled to receive an input signal and to sample the input signal using a first capacitor. A first leakage current flows between first and second conductive terminals of the first switch and accumulates as a first leakage charge in the first capacitor. A second leakage current flows between the first and second conductive terminals of the second switch and accumulates as a second leakage charge in the second capacitor. An offset circuit produces a compensated sampled value by subtracting a quantity from a signal developed in response to the held sampled signal and charge accumulated through the first switch, wherein the quantity is developed in response to the accumulated leakage charge in the second capacitor.
Abstract:
An apparatus and method of providing a pulse width modulated signal that is responsive to a current are disclosed. A circuit according to aspects of the present invention includes a capacitor to convert a first current to a first voltage on the capacitor during a first time duration and to discharge a second current from the capacitor to change the first voltage to a second voltage during a second time duration. A comparator is also included and is coupled to an output of the capacitor to compare a voltage on the capacitor to a reference voltage during the second time duration to change a pulse width of a periodic output signal in response to an input current.
Abstract:
A power supply controller measuring impedance includes a sense circuit coupled to a sense terminal. A regulation circuit is coupled to the sense circuit and is also coupled to regulate the sense terminal to a first voltage level when a current flowing through the sense terminal is less than a first threshold current level. The regulation circuit is further coupled to regulate the sense terminal to a second voltage level when the current flowing through the sense terminal reaches the first threshold current level. A response circuit is coupled to the sense circuit and is responsive to the current flowing through the sense terminal when the sense terminal is regulated at the second voltage level.
Abstract:
A method is disclosed to add functionality to a terminal of a high voltage integrated circuit without the penalty of additional high voltage circuitry. The benefit is that alternative modes of operation can be selected for testing, trimming parameters of the integrated circuit, or any other purpose without the cost of an additional terminal. In one embodiment, ordinary low voltage circuitry monitors the voltage on the terminal that normally is exposed to high voltage. The configuration of a simple voltage detector and an ordinary latch allows easy entry into the test and trimming mode when the integrated circuit is not in the intended application, but prohibits entry into the test and trimming mode when the integrated circuit operates in the intended application.
Abstract:
A method is disclosed to add functionality to a terminal of a high voltage integrated circuit without the penalty of additional high voltage circuitry. The benefit is that alternative modes of operation can be selected for testing, trimming parameters of the integrated circuit, or any other purpose without the cost of an additional terminal. In one embodiment, ordinary low voltage circuitry monitors the voltage on the terminal that normally is exposed to high voltage. The configuration of a simple voltage detector and an ordinary latch allows easy entry into the test and trimming mode when the integrated circuit is not in the intended application, but prohibits entry into the test and trimming mode when the integrated circuit operates in the intended application.
Abstract:
Examples of a method and apparatus for adjusting a reference are disclosed. In one aspect of the invention, a circuit includes a current divider to divide a current from a current source into a first current and a reference current. The circuit also includes a current mirror coupled to the current divider to receive the first current from the current divider and to receive an adjustment current. The adjustment current is to set the reference current.