公开(公告)号：US07000202B1

公开(公告)日：2006-02-14

申请号：US10881832

申请日：2004-06-29

申请人： Arvind Srinivasan ,  Haroon Chaudhri

发明人： Arvind Srinivasan ,  Haroon Chaudhri

IPC分类号： G06F17/50 ,  G06F9/45

CPC分类号： G06F17/5009 ,  G01R31/318357 ,  G01R31/318364 ,  G06F2217/62 ,  G06F2217/84

摘要： A technique to verify, evaluate, and estimate the performance of an integrated circuit is embodied in a computer software program that is executable by a computer system. Vectors are generated to estimate integrated circuit performance. The technique accurately estimates of the performance (e.g., transient delays) of an integrated circuit, and has fast execution times. The technique is applicable to small circuits having relatively few transistors, and especially well suited for integrated circuits having millions of transistors and components. The technique handles the effects of deep-submicron integrated circuit technology.

摘要翻译： 用于验证，评估和估计集成电路的性能的技术体现在可由计算机系统执行的计算机软件程序中。 生成矢量以估计集成电路性能。 该技术精确地估计集成电路的性能（例如，瞬态延迟），并且具有快速的执行时间。 该技术适用于具有相对较少的晶体管的小电路，并且特别适用于具有数百万个晶体管和部件的集成电路。 该技术处理深亚微米集成电路技术的影响。

公开(公告)号：US06952810B2

公开(公告)日：2005-10-04

申请号：US10413280

申请日：2003-04-14

申请人： Lawrence Butcher ,  Krutibas Biswal ,  Arvind Srinivasan

发明人： Lawrence Butcher ,  Krutibas Biswal ,  Arvind Srinivasan

IPC分类号： G06F17/50

CPC分类号： G06F17/5045

摘要： A method is provided, the method comprising collecting related signals capable of having unrelated names into a Krutibus, defining a bus capable of connecting the related signals in a bus definition file in the Krutibus and providing at least one of component declarations of the bus and different uses of the bus in a hardware description language (HDL) circuit description using the bus definition file in the Krutibus. The method also comprises providing a Krutibus preprocessor to read the hardware description language (HDL) circuit description for the at least one of the component declarations of the bus and the different uses of the bus and to generate a hardware description language (HDL) circuit description naming the bus components.

摘要翻译： 提供了一种方法，该方法包括收集能够将无关名称的相关信号收集到Krutibus中，定义能够连接Krutibus中的总线定义文件中的相关信号的总线，并提供总线的分量声明和不同的组件声明中的至少一个 使用总线在硬件描述语言（HDL）电路描述中使用总线定义文件在Krutibus。 该方法还包括提供一个Krutibus预处理器来读取总线的组件声明中的至少一个的总线的硬件描述语言（HDL）电路描述和总线的不同用途，并且生成硬件描述语言（HDL）电路描述 命名总线组件。

公开(公告)号：US20050150111A1

公开(公告)日：2005-07-14

申请号：US10755805

申请日：2004-01-12

申请人： Michael Hopson ,  Glenn Ringle ,  Richard Seidel ,  Arvind Srinivasan

发明人： Michael Hopson ,  Glenn Ringle ,  Richard Seidel ,  Arvind Srinivasan

IPC分类号： B21K1/76 ,  B23P15/00 ,  B21K1/04

CPC分类号： B23P15/00 ,  B21K1/762 ,  B21K1/765 ,  B23P2700/11 ,  F16D2250/00 ,  Y10T29/49636 ,  Y10T29/49684 ,  Y10T29/49689

摘要： The present invention is directed to a constant velocity joint (“CV joint”) and, more particularly, to a Rzeppa CV joint and method of forming the same. The method generally includes the steps of forming a bell shaped outer bearing race and separating the bell shaped outer bearing race into a disc shaped outer bearing race and a stub shaft. The method may further include the step of machining the bell shaped outer bearing race to create the stub shaft integrally connected to the disc shaped outer bearing race, before separating the bell shaped outer bearing race into the disc shaped outer bearing race and the stub shaft.

摘要翻译： 本发明涉及等速万向节（“CV接头”），更具体地说，涉及一种Rzeppa CV接头及其形成方法。 该方法通常包括形成钟形外部轴承座圈并将钟形外部轴承座圈分离成盘形外部轴承座和短轴的步骤。 该方法可以进一步包括在将钟形外轴承座圈分离成盘形外轴承座和短轴之前，加工钟形外轴承座以产生一体地连接到盘形外轴承座的短轴。

公开(公告)号：US06259475B1

公开(公告)日：2001-07-10

申请号：US08723446

申请日：1996-10-07

申请人： Natarajan Ramachandran ,  Philip Laier ,  Howard E. Antram ,  Andrew Junkins ,  Arvind Srinivasan ,  Raymond J. Schuster

发明人： Natarajan Ramachandran ,  Philip Laier ,  Howard E. Antram ,  Andrew Junkins ,  Arvind Srinivasan ,  Raymond J. Schuster

IPC分类号： H04N718

CPC分类号： B60Q1/0023 ,  H04N7/18

摘要： A video-audio surveillance system for a motor vehicle is suitable for observing blind spots as well as for providing security for the vehicle and its contents. The system includes audio-video transmission modules positioned at selected locations on the exterior and interior of the vehicle. An operator or observer either in the vehicle or otherwise monitors the video and audio signals from the modules through a monitoring unit.

摘要翻译： 汽车视频监控系统适用于观察盲点以及为车辆及其内容物提供安全保障。 该系统包括定位在车辆外部和内部的选定位置的音频 - 视频传输模块。 在车辆中的操作员或观察者或者通过监视单元监视来自模块的视频和音频信号。

公开(公告)号：US08914502B2

公开(公告)日：2014-12-16

申请号：US13601530

申请日：2012-08-31

申请人： Arvind Srinivasan ,  Sriram Natarajan

发明人： Arvind Srinivasan ,  Sriram Natarajan

IPC分类号： G06F15/16 ,  G06F15/167 ,  G06F15/177 ,  G06F11/00 ,  H04L1/00 ,  G06F9/50 ,  G06F9/44 ,  G06F9/455 ,  G06F11/20 ,  H04L29/08

CPC分类号： G06F9/505 ,  G06F9/451 ,  G06F9/45512 ,  G06F11/2041 ,  G06F11/3433 ,  G06F17/276 ,  G06F2201/86 ,  H04L41/08 ,  H04L63/0853 ,  H04L67/1002 ,  H04L67/1008 ,  H04L67/1034 ,  H04L2029/06054

摘要： Described herein are systems and methods for use with a load balancer or traffic director, and administration thereof, wherein the traffic director is provided as a software-based load balancer that can be used to deliver a fast, reliable, scalable, and secure platform for load-balancing Internet and other traffic to back-end origin servers, such as web servers, application servers, or other resource servers. In accordance with an embodiment, the system comprises a traffic director having one or more traffic director instances, which is configured to receive and communicate requests, from clients, to origin servers having one or more pools of servers. A health check subsystem periodically checks the health of its configured resource servers, and also attempts to detect changes in the one or more pools, by sending requests to any new server instances configured as origin servers within the pool, receiving appropriate responses, and updating the configuration accordingly.

摘要翻译： 这里描述的是用于与负载平衡器或业务指挥及其管理一起使用的系统和方法，其中业务指导器被提供为基于软件的负载平衡器，其可以用于提供快速，可靠，可扩展和安全的平台，用于 负载平衡互联网和其他流量到后端服务器，如Web服务器，应用程序服务器或其他资源服务器。 根据一个实施例，该系统包括具有一个或多个业务导向器实例的业务导向器，其被配置为从客户端接收和传送请求到具有一个或多个服务器池的源服务器。 运行状况检查子系统会定期检查其配置的资源服务器的运行状况，并尝试通过向配置为池中的原始服务器的任何新服务器实例发送请求来检测一个或多个池中的更改，接收适当的响应，并更新 配置相应。

公开(公告)号：US08690690B2

公开(公告)日：2014-04-08

申请号：US13170547

申请日：2011-06-28

申请人： Jonathan David Conger ,  Arvind Srinivasan ,  Richard Lawrence Seidel

发明人： Jonathan David Conger ,  Arvind Srinivasan ,  Richard Lawrence Seidel

IPC分类号： F16D3/226

CPC分类号： F16D3/223 ,  F16D1/116 ,  F16D3/227 ,  F16D2003/22323

摘要： A shaft assembly that includes a propshaft member and a constant velocity joint. The constant velocity joint has an outer race, which is coupled for rotation with the propshaft member, an inner race, a plurality of bearing balls disposed between the outer and inner races to transmit rotary power therebetween, a shaft member coupled for rotation with the inner race, and a boot assembly that is sealingly engaged to the outer race and the shaft member. The shaft member defines a coupling portion that extends from the boot assembly. A method for coupling a shaft member to a driveline component is also provided.

摘要翻译： 一种轴组件，包括一个主轴构件和一个恒速接头。 等速万向节具有外座圈，该外座圈与传动轴构件，内座圈，多个轴承球联接以旋转，该轴承球设置在外座圈和内座圈之间，以在其间传递旋转动力;轴构件，其联接成与内圈 座圈和密封地接合到外圈和轴构件的靴子组件。 轴构件限定从靴组件延伸的联接部分。 还提供了一种用于将轴构件耦合到传动系构件的方法。

公开(公告)号：US08271716B2

公开(公告)日：2012-09-18

申请号：US12697940

申请日：2010-02-01

申请人： Arvind Srinivasan

发明人： Arvind Srinivasan

IPC分类号： G06F13/36

CPC分类号： G06F5/00 ,  G06F13/28 ,  G06F13/36

摘要： Methods and apparatus are provided for simultaneously supporting multiple hosts with a single communication port; each host may host multiple functions. The input/output device comprises multiple buffers; each buffer stores packets for one host, but can be dynamically reallocated to a different host. Multiple buffers may simultaneously support the same host and all of its functions. After a packet is received and classified, it is distributed to buffer ingress managers. Within a set of ingress managers serving one buffer, each manager corresponds to one function of the buffer's corresponding host, and is programmed with criteria for identifying packets desired by that function. One copy of the packet is stored in a buffer if at least one of the buffer's ingress managers accepts it, along with control information for processing the packet upon egress from the buffer. Egress managers for each buffer extract packets and transfer them to destination host/functions.

摘要翻译： 提供了用于同时支持具有单个通信端口的多个主机的方法和装置; 每个主机可以承载多个功能。 输入/输出设备包括多个缓冲器; 每个缓冲区存储一个主机的数据包，但可以动态地重新分配给不同的主机。 多个缓冲器可以同时支持相同的主机及其所有功能。 收到分组后，分发给缓冲区入口管理员。 在一个服务于一个缓冲区的入口管理器集合中，每个管理器对应于缓冲器相应主机的一个功能，并且用标识符来标识该功能所需的包。 如果缓冲器的入口管理器中的至少一个入口管理器接收到该数据包的一个副本以及用于在从缓冲器出口处理数据包的控制信息的情况下，存储该数据包的一个副本。 每个缓冲区的出口管理器将提取数据包并将其传输到目标主机/函数。

公开(公告)号：US08255593B2

公开(公告)日：2012-08-28

申请号：US12569173

申请日：2009-09-29

申请人： Ajoy C. Siddabathuni ,  Arvind Srinivasan

发明人： Ajoy C. Siddabathuni ,  Arvind Srinivasan

IPC分类号： G06F13/28 ,  G06F13/00 ,  G06F9/26

CPC分类号： G06F13/28

摘要： A DMA device may include an offset determination unit configured to determine a first offset for a DMA transfer and a data transfer unit. The data transfer unit may be configured to receive a first buffer starting address identifying a starting location of a first buffer allocated in memory for the DMA transfer and to generate a first buffer offset address by applying the first offset to the first buffer starting address. The data transfer unit may be further configured to use the first buffer offset address as a starting location in the first buffer for data transferred in the DMA transfer. By applying various offsets, such DMA devices may spread memory access workload across multiple memory controllers, thereby achieving better workload balance and performance in the memory system.

摘要翻译： DMA设备可以包括被配置为确定用于DMA传输的第一偏移量和数据传送单元的偏移确定单元。 数据传送单元可以被配置为接收标识用于DMA传输的在存储器中分配的第一缓冲器的起始位置的第一缓冲器起始地址，并且通过将第一偏移应用于第一缓冲器起始地址来生成第一缓冲器偏移地址。 数据传送单元还可以被配置为使用第一缓冲器偏移地址作为在DMA传送中传送的数据的第一缓冲器中的起始位置。 通过应用各种偏移，这样的DMA设备可以在多个存储器控制器之间扩展存储器访问工作负载，从而实现更好的工作负载平衡和存储系统中的性能

公开(公告)号：US08214553B2

公开(公告)日：2012-07-03

申请号：US12697953

申请日：2010-02-01

申请人： Arvind Srinivasan

发明人： Arvind Srinivasan

IPC分类号： G06F3/00 ,  G06F13/28 ,  G06F5/00

CPC分类号： G06F3/00 ,  G06F13/28

摘要： Methods and apparatus are provided for simultaneously supporting multiple hosts with a single communication port; each host may host multiple functions. The input/output device comprises multiple buffers; each buffer stores packets for one host, but can be dynamically reallocated to a different host. Multiple buffers may simultaneously support the same host and all of its functions. After a packet is received and classified, it is stored in at least one buffer, along with control information for processing the packet upon egress from the buffer. Egress managers for each buffer extract packets and transfer them to destination host/functions, by speculatively moving the packets forward even while DMA engines perform their processing to facilitate their transfer.

摘要翻译： 提供了用于同时支持具有单个通信端口的多个主机的方法和装置; 每个主机可以承载多个功能。 输入/输出设备包括多个缓冲器; 每个缓冲区存储一个主机的数据包，但可以动态地重新分配给不同的主机。 多个缓冲器可以同时支持相同的主机及其所有功能。 在分组被接收和分类之后，它被存储在至少一个缓冲器中，以及用于在从缓冲器出口处理分组时的控制信息。 每个缓冲区的出口管理器提取数据包并将其传输到目标主机/功能，即使在DMA引擎执行其处理以促进其传输时也通过推测性地移动数据包。

公开(公告)号：US07930673B2

公开(公告)日：2011-04-19

申请号：US12128554

申请日：2008-05-28

申请人： Yunjian (William) Jiang ,  Arvind Srinivasan ,  Joy Banerjee ,  Yinghua Li ,  Partha Das ,  Samit Chaudhuri

发明人： Yunjian (William) Jiang ,  Arvind Srinivasan ,  Joy Banerjee ,  Yinghua Li ,  Partha Das ,  Samit Chaudhuri

IPC分类号： G06F17/50

CPC分类号： G06F17/505 ,  G06F17/5031 ,  G06F2217/08

摘要： A power optimization method of deriving gated circuitry in a synthesized netlist of an integrated circuit (IC) design is provided. A block in the synthesized netlist is identified as an idle candidate block. Sub-blocks on the chip are clustered into a cluster. For the cluster, a clock gating structure optimized for power savings is determined, based on the idle candidate block. One or more inflexible clock gates are inserted in the netlist according to the clock gate structure.

摘要翻译： 提供了一种在集成电路（IC）设计的综合网表中导出门控电路的功率优化方法。 合成网表中的块被标识为空闲候选块。 芯片上的子块被聚集成一个集群。 对于集群，基于空闲候选块确定针对功率节省优化的时钟门控结构。 根据时钟门结构，在网表中插入一个或多个不灵活的时钟门。