公开(公告)号：US11233371B2

公开(公告)日：2022-01-25

申请号：US16777003

申请日：2020-01-30

Applicant: Ayar Labs, Inc.

Inventor： Milos Popovic ,  Rajeev Ram ,  Vladimir Stojanovic ,  Chen Sun ,  Mark Taylor Wade ,  Alexandra Carroll Wright

IPC: H04J14/02 ,  H01S3/08 ,  H04B10/50 ,  H01S3/00 ,  H01S3/04 ,  H01S3/23 ,  H04B10/25 ,  H04B10/40 ,  H04B10/572

Abstract: A laser light generator is configured to generate one or more wavelengths of continuous wave laser light. The laser light generator is configured to collectively and simultaneously transmit each of the wavelengths of continuous wave laser light through an optical output of the laser light generator as a laser light supply. An optical fiber is connected to receive the laser light supply from the optical output of the laser light generator. An optical distribution network has an optical input connected to receive the laser light supply from the optical fiber. The optical distribution network is configured to transmit the laser light supply to each of one or more optical transceivers and/or optical sensors. The laser light generator is physically separate from each of the one or more optical transceivers and/or optical sensors.

公开(公告)号：US20210257021A1

公开(公告)日：2021-08-19

申请号：US17175678

申请日：2021-02-14

Applicant: Ayar Labs, Inc.

Inventor： Roy Edward Meade ,  Vladimir Stojanovic ,  Chen Sun ,  Mark Wade ,  Hugo Saleh ,  Charles Wuischpard

IPC: G11C11/42 ,  G11C5/04 ,  G11C5/06

Abstract: A computer memory system includes an electro-optical chip, an electrical fanout chip electrically connected to an electrical interface of the electro-optical chip, and at least one dual in-line memory module (DIMM) slot electrically connected to the electrical fanout chip. A photonic interface of the electro-optical chip is optically connected to an optical link. The electro-optical chip includes at least one optical macro that converts outgoing electrical data signals into outgoing optical data signals for transmission through the optical link. The optical macro also converts incoming optical data signals from the optical link into incoming electrical data signals and transmits the incoming electrical data signals to the electrical fanout chip. The electrical fanout chip directs bi-directional electrical data communication between the electro-optical chip and a dynamic random access memory (DRAM) DIMM corresponding to the at least one DIMM slot.

公开(公告)号：US20200310035A1

公开(公告)日：2020-10-01

申请号：US16831734

申请日：2020-03-26

Applicant: Ayar Labs, Inc.

Inventor： Pavan Bhargava ,  John Fini ,  Derek Van Orden ,  Chen Sun ,  Mark Wade

IPC: G02B6/293 ,  G02F1/225

Abstract: A ring resonator device includes a passive optical cavity having a circuitous configuration into which is built a photodetector device. The photodetector device includes a first implant region formed within the passive optical cavity that includes a first type of implanted doping material. The photodetector device includes a second implant region formed within the passive optical cavity that includes a second type of implanted doping material, where the second type of implanted doping material is different than the first type of implanted doping material. The photodetector device includes an intrinsic absorption region present within the passive optical cavity between the first implant region and the second implant region. A first electrical contact is electrically connected to the first implant region and to a detecting circuit. A second electrical contact is electrically connected to the second implant region and to the detecting circuit.

公开(公告)号：US20200264390A1

公开(公告)日：2020-08-20

申请号：US16866528

申请日：2020-05-04

Applicant: Ayar Labs, Inc.

Inventor： Mark Wade ,  Chen Sun ,  John Fini ,  Roy Edward Meade ,  Vladimir Stojanovic ,  Alexandra Wright

IPC: G02B6/42 ,  H01L29/06

Abstract: A photonic chip includes a substrate, an electrical isolation region formed over the substrate, and a front end of line (FEOL) region formed over the electrical isolation region. The photonic chip also includes an optical coupling region. The electrical isolation region and the FEOL region and a portion of the substrate are removed within the optical coupling region. A top surface of a the substrate within the optical coupling region includes a plurality of grooves configured to receive and align a plurality of optical fibers. The grooves are formed at a vertical depth within the substrate to provide for alignment of optical cores of the plurality of optical fibers with the FEOL region when the plurality of optical fibers are positioned within the plurality of grooves within the optical coupling region.

公开(公告)号：US10749603B2

公开(公告)日：2020-08-18

申请号：US16194250

申请日：2018-11-16

Applicant: Ayar Labs, Inc.

Inventor： Chen Sun ,  Roy Edward Meade ,  Mark Wade ,  Alexandra Wright ,  Vladimir Stojanovic ,  Rajeev Ram ,  Milos Popovic ,  Derek Van Orden ,  Michael Davenport

IPC: G02B6/12 ,  H04B10/50 ,  H01S5/022 ,  H01S5/40 ,  H01S5/026 ,  H04B10/80 ,  H01S5/024 ,  H01S5/50 ,  G02B6/42

Abstract: An interposer device includes a substrate that includes a laser source chip interface region, a silicon photonics chip interface region, an optical amplifier module interface region. A fiber-to-interposer connection region is formed within the substrate. A first group of optical conveyance structures is formed within the substrate to optically connect a laser source chip to a silicon photonics chip when the laser source chip and the silicon photonics chip are interfaced to the substrate. A second group of optical conveyance structures is formed within the substrate to optically connect the silicon photonics chip to an optical amplifier module when the silicon photonics chip and the optical amplifier module are interfaced to the substrate. A third group of optical conveyance structures is formed within the substrate to optically connect the optical amplifier module to the fiber-to-interposer connection region when the optical amplifier module is interfaced to the substrate.

公开(公告)号：US20180217344A1

公开(公告)日：2018-08-02

申请号：US15886822

申请日：2018-02-01

Applicant: Ayar Labs, Inc.

Inventor： John Fini ,  Roy Edward Meade ,  Mark Wade ,  Chen Sun ,  Vladimir Stojanovic ,  Alexandra Wright

IPC: G02B6/43 ,  G02B6/42

CPC classification number: G02B6/43 ,  G02B6/4216 ,  H04B10/40 ,  H04B10/801

Abstract: An optical module includes a laser light supply system and a chip disposed within a housing. The chip includes a laser input optical port and a transmit data optical port and a receive data optical port. The optical module includes a link-fiber interface exposed at an exterior surface of the housing. The link-fiber interface includes a transmit data connector and a receive data connector. The optical module includes a polarization-maintaining optical fiber connected between a laser output optical port of the laser light supply system and the laser input optical port of the chip. The optical module includes a first non-polarization-maintaining optical fiber connected between the transmit data optical port of the chip and the transmit data connector of the link-fiber interface. The optical module includes a second non-polarization-maintaining optical fiber connected between the receive data optical port of the chip and the receive data connector of the link-fiber interface.

公开(公告)号：US12072532B2

公开(公告)日：2024-08-27

申请号：US17982497

申请日：2022-11-07

Applicant: Ayar Labs, Inc.

Inventor： Pavan Bhargava ,  Derek Van Orden ,  Mark Wade ,  John Fini ,  Chen Sun ,  Milos Popovic ,  Anatol Khilo

IPC: G02B6/293 ,  G02B6/27 ,  G02B6/42 ,  G02B27/10 ,  G02B27/28 ,  H04B10/60

CPC classification number: G02B6/29343 ,  G02B6/272 ,  G02B6/2766 ,  G02B6/2773 ,  G02B6/2934 ,  G02B6/4213 ,  G02B6/4215 ,  G02B27/1006 ,  H04B10/60

Abstract: An electro-optic combiner includes a polarization splitter and rotator (PSR) that directs a portion of incoming light having a first polarization through a first optical waveguide (OW). The PSR rotates a portion of the incoming light having a second polarization to the first polarization to provide polarization-rotated light. The PSR directs the polarization-rotated light through a second OW. Each of the first and second OW's has a respective combiner section. The first and second OW combiner sections extend parallel to each other and have opposite light propagation directions. A plurality of ring resonators is disposed between the combiner sections of the first and second OW's and within an evanescent optically coupling distance of both the first and second OW's. Each of ring resonators operates at a respective resonant wavelength to optically couple light from the combiner section of the first OW into the combiner section of the second OW.

公开(公告)号：US20240187110A1

公开(公告)日：2024-06-06

申请号：US18419461

申请日：2024-01-22

Applicant: Ayar Labs, Inc.

Inventor： Roy Edward Meade ,  Vladimir Stojanovic ,  Chen Sun ,  Mark Wade ,  Hugo Saleh ,  Charles Wuischpard

IPC: H04B10/80 ,  G02B6/42 ,  G11C5/04 ,  G11C5/06 ,  G11C5/14 ,  G11C11/42 ,  H04B10/516

CPC classification number: H04B10/80 ,  G02B6/4249 ,  G02B6/4274 ,  G11C5/04 ,  G11C5/06 ,  G11C5/141 ,  G11C11/42 ,  H04B10/516

Abstract: A remote memory system includes a substrate of a multi-chip package, an integrated circuit chip connected to the substrate, and an electro-optical chip connected to the substrate. The integrated circuit chip includes a high-bandwidth memory interface. An electrical interface of the electro-optical chip is electrically connected to the high-bandwidth memory interface. A photonic interface of the electro-optical chip is configured to optically connect with an optical link. The electro-optical chip includes at least one optical macro that converts outgoing electrical data signals received through the electrical interface from the high-bandwidth interface into outgoing optical data signals. The optical macro transmits the outgoing optical data signals through the photonic interface to the optical link. The optical macro also converts incoming optical data signals received through the photonic interface into incoming electrical data signals. The optical macro transmits the incoming electrical data signals through the electrical interface to the high-bandwidth memory interface.

公开(公告)号：US11988881B2

公开(公告)日：2024-05-21

申请号：US18165278

申请日：2023-02-06

Applicant: Ayar Labs, Inc.

Inventor： John Fini ,  Anatol Khilo ,  Chen Sun ,  Pavan Bhargava ,  Chandarasekaran Ramamurthy

IPC: G02B6/293 ,  G02B6/42 ,  H04B10/60

CPC classification number: G02B6/4215 ,  G02B6/29335 ,  G02B6/29338 ,  G02B6/2938 ,  G02B6/29395 ,  G02B6/4213 ,  H04B10/60 ,  G02B6/29343

Abstract: A first portion of incoming light and a second portion of incoming light travel in opposite directions within a first optical waveguide. A ring resonator in-couples the first portion of incoming light and the second portion of incoming light from the first optical waveguide, such that the first portion of incoming light and the second portion of incoming light travel in opposite directions within the ring resonator. A second optical waveguide is disposed to in-couple the first portion of incoming light and the second portion of incoming light couple from the ring resonator, such that the first portion of incoming light and the second portion of incoming light travel in opposite directions within the second optical waveguide away from the ring resonator. One or more photodetector(s) are optically connected to receive the first portion of incoming light and the second portion of incoming light from the second optical waveguide.

公开(公告)号：US11916602B2

公开(公告)日：2024-02-27

申请号：US17175677

申请日：2021-02-14

Applicant: Ayar Labs, Inc.

Inventor： Roy Edward Meade ,  Vladimir Stojanovic ,  Chen Sun ,  Mark Wade ,  Hugo Saleh ,  Charles Wuischpard

IPC: H04B10/00 ,  H04B10/80 ,  H04B10/516 ,  G11C5/04 ,  G11C5/06 ,  G11C11/42 ,  G02B6/42 ,  G11C5/14 ,  H04J14/00

CPC classification number: H04B10/80 ,  G02B6/4249 ,  G02B6/4274 ,  G11C5/04 ,  G11C5/06 ,  G11C5/141 ,  G11C11/42 ,  H04B10/516

Abstract: A remote memory system includes a substrate of a multi-chip package, an integrated circuit chip connected to the substrate, and an electro-optical chip connected to the substrate. The integrated circuit chip includes a high-bandwidth memory interface. An electrical interface of the electro-optical chip is electrically connected to the high-bandwidth memory interface. A photonic interface of the electro-optical chip is configured to optically connect with an optical link. The electro-optical chip includes at least one optical macro that converts outgoing electrical data signals received through the electrical interface from the high-bandwidth interface into outgoing optical data signals. The optical macro transmits the outgoing optical data signals through the photonic interface to the optical link. The optical macro also converts incoming optical data signals received through the photonic interface into incoming electrical data signals. The optical macro transmits the incoming electrical data signals through the electrical interface to the high-bandwidth memory interface.