Pixel circuit for threshold compensation, driving method thereof and display device for providing signals

    公开(公告)号:US12198629B2

    公开(公告)日:2025-01-14

    申请号:US18325032

    申请日:2023-05-29

    Inventor: Can Zheng

    Abstract: Disclosed are a pixel circuit, a driving method of the pixel circuit and a display device, the pixel circuit including a reset unit, a voltage writing unit and a light-emitting control unit, the reset unit is connected to a reset control signal terminal, and resets the pixel circuit under the control of the reset control signal; the voltage writing unit stores a data signal and a threshold voltage of a driving transistor under the control of the scan control signal; the light-emitting control unit is connected to a light-emitting control signal terminal and includes the driving transistor, and use the data signal and the threshold voltage to generate a current under control of the light-emitting control signal; the light-emitting control unit includes a first type transistor, the reset unit and the voltage writing unit include a second type transistor different from the first type transistor.

    Shift register and driving method thereof, gate drive circuit, and display device

    公开(公告)号:US11581051B2

    公开(公告)日:2023-02-14

    申请号:US16613125

    申请日:2019-05-21

    Inventor: Can Zheng

    Abstract: A shift register and a driving method thereof, a gate drive circuit, and a display device are provided. The shift register includes: an input circuit, configured to input an input voltage provided by the input voltage terminal to an intermediate circuit under control of a first clock signal provided by the first clock signal terminal; the intermediate circuit, configured to write a second clock signal output by the second clock signal terminal or a first power signal output by the first power terminal to the intermediate output terminal as an intermediate output signal under control of the input voltage and the control circuit; and an output circuit, configured to output an output signal, a phase of which is opposite to a phase of the intermediate output signal.

    Gate driving unit having node isolation

    公开(公告)号:US11574597B2

    公开(公告)日:2023-02-07

    申请号:US17426949

    申请日:2020-10-27

    Abstract: A gate driving unit, a gate driving circuit, a gate driving method, and a display device are provided. The gate driving unit includes a first output circuit and a second output circuit; the second output circuit comprises a first output sub-circuit; the first output circuit is respectively electrically connected to the first node, the second node and the first gate driving signal output end and is configured to control the first gate driving signal output end to output a first gate driving signal under the control of the potential of the first node and the potential of the second node; the first output sub-circuit is respectively electrically connected to the first node, the second gate driving signal output end and the first clock signal end, and is configured to control the second gate driving signal output end to be connected to the first clock signal end.

    Gate driving circuit, gate driving method, foldable display panel, and display apparatus

    公开(公告)号:US11227521B2

    公开(公告)日:2022-01-18

    申请号:US16652180

    申请日:2019-10-18

    Abstract: The present disclosure relates to a gate driving circuit applied to a foldable display panel comprising B display areas arranged in order. The gate driving circuit may include B gate driving subcircuits and a control circuit. Each of the gate driving subcircuits may correspond to one of the display areas and each of the gate driving subcircuits may comprise a plurality of stage gate driving units. The control circuit may be configured to, when the foldable display panel is in a full screen display state, control a type of an input signal in a last stage gate driving unit of a bth gate driving subcircuit to be the same as a type of an input signal in a first stage gate driving unit of a (b+1)th gate driving subcircuit, where B is an integer greater than 1 and b is a positive integer less than B.

    Gate driving circuit and display substrate

    公开(公告)号:US11205364B2

    公开(公告)日:2021-12-21

    申请号:US17052893

    申请日:2019-12-24

    Abstract: A gate driving circuit and a display substrate are provided. The gate driving circuit may provide a driving signal to gate lines, and include output units cascaded to each other and having a same circuit structure. Each output unit includes at least one output transistor, outputs the driving signal to a corresponding gate line through the output transistor, and all the at least one output transistor is coupled to one gate line. The output units are classified as first and second output units. A number of sub-pixels coupled to the gate line corresponding to each first output unit is greater than a number of sub-pixels coupled to the gate line corresponding to each second output unit, and an output capability of at least one output transistor of the first output unit is greater than an output capability of a corresponding output transistor of the second output unit.

    Shift register unit, method for driving shift register unit, gate driving circuit, method for driving gate driving circuit, and display device

    公开(公告)号:US11011093B2

    公开(公告)日:2021-05-18

    申请号:US16619308

    申请日:2018-07-19

    Inventor: Can Zheng

    Abstract: A shift register unit, a driving method, a gate driving circuit and a display device are provided. The shift register unit includes: a starting circuit configured to control, under control of a first clock signal input terminal, turning on or off coupling between a first node and a starting voltage input terminal; a first capacitor circuit, having a first terminal being coupled to a second clock signal input terminal, and a second terminal being coupled to the first node; a first node control circuit configured to control, under control of a third node, turning on or off coupling between the first node and a first level input terminal; a potential control circuit configured to control, under control of the first node, turning on or off coupling between the second node and a second level input terminal; a second capacitor circuit; a second node control circuit; an output circuit; and a third node control circuit.

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