公开(公告)号：US20180076223A1

公开(公告)日：2018-03-15

申请号：US15525468

申请日：2016-07-22

Applicant: BOE TECHNOLOGY GROUP CO., LTD. ,  CHONGQING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.

Inventor： Rui WANG ,  Haijun QIU ,  Fei SHANG ,  Jaikwang KIM ,  Shaoru LI

IPC: H01L27/12 ,  H01L29/786 ,  H01L21/768

CPC classification number: H01L27/124 ,  G02F1/133707 ,  G02F1/136227 ,  G02F1/136286 ,  G02F2001/134372 ,  H01L21/76802 ,  H01L21/76877 ,  H01L27/1262 ,  H01L29/78633

Abstract: A display substrate, a display apparatus and a production method of the display substrate are provided. The display substrate includes a plurality of pixel units arranged in an array. Each of the pixel units includes: a first electrode; a first connection portion connected with the first electrode; and a first connection line, the first connection portion being connected to the first connection line through a first via hole. The first connection line of at least one of the pixel units is connected with the first connection line of the pixel unit positioned on an upper side of the at least one of the pixel units and the first connection line of the pixel unit positioned on a lower side of the at least one of the pixel units.

公开(公告)号：US20240407212A1

公开(公告)日：2024-12-05

申请号：US18697095

申请日：2023-06-21

Applicant: Chengdu BOE Optoelectronics Technology Co., Ltd. ,  BOE Technology Group Co., Ltd.

Inventor： Kemeng TONG ,  Jun YAN ,  Fan HE ,  Xiangdan DONG ,  Ansu LEE ,  Mengmeng DU ,  Tingliang LIU ,  Wei ZHANG ,  Haijun QIU ,  Ming HU ,  Yongliang ZHAO ,  Zhiliang JIANG ,  Gukhwan SONG ,  Rui WANG ,  Taofeng XIE ,  Hai ZHENG ,  Yi ZHANG ,  Fengli JI ,  Haigang QING ,  Zhenglong YAN

IPC: H10K59/131 ,  G06F3/041 ,  G06F3/044 ,  H10K59/40 ,  H10K59/80

Abstract: A display panel and a display device are provided. The display panel includes a display area and a non-display area on a side of the display area. The non-display area includes a bending area, a bonding area, and a wiring area between the bending area and the bonding area. The display panel includes: a base substrate and a touch structure on the base substrate. The touch structure includes a touch lead led out from the display area and extending to the bonding area. The touch lead includes a first lead in the bending area and a second lead in the wiring area. The first lead and the second lead are electrically connected and located in different metal layers. The second lead is made of a single-layer metal wire.

公开(公告)号：US20240393897A1

公开(公告)日：2024-11-28

申请号：US18262091

申请日：2022-05-17

Applicant: Chongqing BOE Display Technology Co.,Ltd. ,  BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Chao ZENG ,  Shouqiang ZHANG ,  Rui WANG ,  Weishu WEN ,  Xinghua CUI ,  Yifan LIU

IPC: G06F3/041

Abstract: A touch substrate includes a first layer wiring group and a second layer wiring group that are located in a peripheral region. The first layer wiring group includes a plurality of first wirings, the second layer wiring group includes a plurality of second wirings, and a square resistance of a first wiring is greater than a square resistance of a second wiring. The peripheral region includes a first wiring region provided with at least one first-type touch lead therein and a second wiring region provided with at least one second-type touch lead therein. Each first-type touch lead includes a first wiring and a second wiring that are connected to each other and whose orthographic projections on the touch substrate are overlapped. Each second-type touch lead includes a second wiring or a first wiring. A length of the first-type touch lead is greater than a length of the second-type touch lead.

公开(公告)号：US20240389415A1

公开(公告)日：2024-11-21

申请号：US17914584

申请日：2021-09-24

Applicant: Chongqing BOE Display Technology Co.,Ltd. ,  BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Rui WANG ,  Chao ZENG ,  Yuanyou QIU ,  Ming HU ,  Weishu WEN

IPC: H10K59/131

Abstract: An array substrate has a display area and a peripheral area. The array substrate includes a substrate, a first common voltage line disposed on a first side of the substrate, and a voltage signal introduction structure disposed on the first side of the substrate. The first common voltage line is located in the peripheral area and arranged along at least part of a boundary of the display area. The voltage signal introduction structure is electrically connected to at least one position except two ends of the first common voltage line, so as to input a voltage signal to the first common voltage line.

公开(公告)号：US20240304148A1

公开(公告)日：2024-09-12

申请号：US18669642

申请日：2024-05-21

Applicant: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD. ,  BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Rui WANG ,  Ming HU ,  Haijun QIU ,  Weiyun HUANG ,  Yao HUANG ,  Chao ZENG ,  Yuanyou QIU ,  Shaoru LI ,  Tianyi CHENG

IPC: G09G3/3233

CPC classification number: G09G3/3233 ,  G09G2300/0426 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2310/08 ,  G09G2320/0233 ,  G09G2320/0247

Abstract: A pixel circuit and a driving method thereof, and a display device are provided. The pixel circuit includes a driving sub-circuit, a data writing sub-circuit, a first light-emitting control sub-circuit, a second light-emitting control sub-circuit, a compensation sub-circuit, and a first reset sub-circuit, and is configured to generate a driving current to control a light-emitting element to emit light, the first reset sub-circuit comprises a first transistor, the compensation sub-circuit comprises a second transistor, the first transistor and the second transistor are both polysilicon oxide thin film transistors, and an active layer type of the first transistor and an active layer type of the second transistor are different from an active layer type of a transistor comprised in at least one selected from a group consisting of the driving sub-circuit, the data writing sub-circuit, the first light-emitting control sub-circuit, and the second light-emitting control sub-circuit.

公开(公告)号：US20220384555A1

公开(公告)日：2022-12-01

申请号：US16975521

申请日：2019-10-29

Applicant: Chengdu BOE Optoelectronics Technology Co., Ltd. ,  BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Hongwei MA ,  Xiangdan DONG ,  Rui WANG

IPC: H01L27/32

Abstract: A display substrate and a manufacturing method thereof, and a display device are disclosed. The display substrate includes a base substrate, lead wires, a plurality of contact pads, a first insulation laminated layer, and a second insulation laminated layer. The base substrate includes a display region, a dam region at least partially surrounding the display region, a transition region on a side of the dam region away from the display region, and a first bonding region and a bonding peripheral region on a side of the transition region away from the dam region. The plurality of contact pads is in the first bonding region and configured to be electrically connected to the lead wires. The first insulation laminated layer is in the first bonding region. The second insulation laminated layer is in the bonding peripheral region.

公开(公告)号：US20220344377A1

公开(公告)日：2022-10-27

申请号：US17432105

申请日：2021-02-01

Applicant: Chongqing BOE Optoelectronics Technology Co., Ltd. ,  BOE Technology Group Co., Ltd.

Inventor： Zhiyong NING ,  Zhonghao HUANG ,  Chao ZHANG ,  Zhaojun WANG ,  Hongru ZHOU ,  Yutong YANG ,  Rui WANG ,  Xu WU ,  Kunkun GAO

IPC: H01L27/12

Abstract: A half via hole structure, a method for manufacturing the same, an array substrate, and a display panel are provided. The half via hole structure includes: a spacer layer arranged on an underlaying substrate; a passivation layer arranged on the spacer layer and provided with a first via hole, an orthographic projection of the first via hole on the underlaying substrate being within that of the spacer layer on the underlaying substrate; a first conductive layer arranged on the spacer layer and having a width smaller than a diameter of the first via hole; an insulating layer arranged between the spacer layer and the passivation layer and provided with a second via hole; and a second conductive layer arranged on the passivation layer and overlapped with the first conductive layer through the first via hole.

公开(公告)号：US20170207252A1

公开(公告)日：2017-07-20

申请号：US15325459

申请日：2016-07-01

Applicant: BOE TECHNOLOGY GROUP CO., LTD ,  CHONGQING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD

Inventor： Zhuo XU ,  Jaikwang KIM ,  Fei SHANG ,  Yajie BAI ,  Rui WANG

IPC: H01L27/12

CPC classification number: H01L27/1255 ,  G02F1/13624 ,  G02F1/136286 ,  G02F2001/134345 ,  H01L27/124 ,  H01L27/1288

Abstract: The present disclosure provides an array substrate, including: a plurality of gate lines and a plurality of data lines intersecting with one another for defining a plurality of pixel regions, each pixel region including two pixel units, each pixel unit including a pixel electrode; and a common electrode line and a pixel electrode line, the pixel electrode line being electrically connected to the pixel electrode. The common electrode line and at least one pixel electrode line form at least an overlapping area for forming at least one storing capacitor there-between.

公开(公告)号：US20170200739A1

公开(公告)日：2017-07-13

申请号：US15258161

申请日：2016-09-07

Applicant: BOE TECHNOLOGY GROUP CO., LTD. ,  CHONGQING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.

Inventor： Xiaoyuan WANG ,  Wu WANG ,  Rui WANG ,  Yajie BAI ,  Zhuo XU

IPC: H01L27/12

CPC classification number: G02F1/1339 ,  G02F1/1343

Abstract: Embodiments of the present disclosure provide an array substrate and a manufacturing method thereof, and a display device. The array substrate has a display region and a wiring region located on a periphery of the display region. The array substrate includes a base substrate, and a transparent conductive strip and a wire formed on the base substrate in the wiring region; the transparent conductive strip and the wire are located in different layers and are in direct contact with each other, and the wire has one or more exposure holes formed therein.