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268 条记录 (耗时 0.025 秒)

    Using localized ionizer to reduce electrostatic charge from wafer and mask
    41.
    发明授权
    Using localized ionizer to reduce electrostatic charge from wafer and mask 有权
    使用局部电离器来减少晶片和掩模的静电电荷

    公开(公告)号：US06507474B1

    公开(公告)日：2003-01-14

    申请号：US09597126

    申请日：2000-06-19

    申请人： Bhanwar Singh ,  Ramkumar Subramanian ,  Khoi A. Phan ,  Bryan K. Choo ,  Bharath Rangarajan

    发明人： Bhanwar Singh ,  Ramkumar Subramanian ,  Khoi A. Phan ,  Bryan K. Choo ,  Bharath Rangarajan

    IPC分类号： H01T2300

    CPC分类号： G03F7/70616 ,  G03F7/70941

    摘要： One aspect of the present invention elates to a method of reducing electrostatic charges on a patterned photoresist to improve evaluation of the developed photoresist, involving the steps of evaluating the patterned photoresist to determine if electrostatic charges exist thereon; positioning an ionizer near the patterned photoresist, the ionizer generating ions thereby reducing the electrostatic charges on the patterned photoresist; and evaluating the patterned photoresist with an electron beam. Another aspect of the present invention relates to a system for reducing electrostatic charges on a patterned photoresist, containing a charge sensor for determining if electrostatic charges exist on the patterned photoresist and measuring the electrostatic charges; an ionizer positioned near the patterned photoresist having electrostatic charges thereon for reducing the electrostatic charges on the patterned photoresist; a controller for setting at least one of time of ion generation and amount of ion generation by the ionizer, the controller coupled to the charge sensor and the ionizer; and a scanning electron microscope or an atomic force microscope for evaluating the patterned photoresist having reduced electrostatic charges thereon with an electron beam.

    摘要翻译： 本发明的一个方面是提供减少图案化光致抗蚀剂上的静电电荷以改进对显影光致抗蚀剂的评估的方法，包括评估图案化光致抗蚀剂以确定静电电荷是否存在于其中的步骤; 在图案化的光致抗蚀剂附近定位电离器，离子发生器产生离子，从而减少图案化光致抗蚀剂上的静电电荷; 并用电子束评估图案化的光致抗蚀剂。 本发明的另一方面涉及一种用于减少图案化光致抗蚀剂上的静电电荷的系统，其包含用于确定图案化光致抗蚀剂上是否存在静电电荷并测量静电电荷的电荷传感器; 位于图案化的光致抗蚀剂附近的电离器，其上具有静电电荷，用于减少图案化光致抗蚀剂上的静电电荷; 用于设置离子发生时间和离子发生量中的至少一个的控制器，耦合到电荷传感器和离子发生器的控制器; 以及扫描电子显微镜或原子力显微镜，用于用电子束评估其上具有降低的静电电荷的图案化光致抗蚀剂。

    System and method to facilitate removal of defects from a substrate
    42.
    发明授权
    System and method to facilitate removal of defects from a substrate 失效
    有助于从基底去除缺陷的系统和方法

    公开(公告)号：US06486072B1

    公开(公告)日：2002-11-26

    申请号：US09709974

    申请日：2000-11-10

    申请人： Khoi A. Phan ,  Bharath Rangarajan ,  Bhanwar Singh

    发明人： Khoi A. Phan ,  Bharath Rangarajan ,  Bhanwar Singh

    IPC分类号： H01L21302

    CPC分类号： H01L21/02046

    摘要： A system and method are disclosed for facilitating removal of a defect from a substrate. A charge is applied at the surface of substrate, such as in the form of an ionized gas, to weaken attractive forces between the defect and the substrate. As a result of weakening the attractive forces, a suitable defect removal system may be employed to remove the defect.

    摘要翻译： 公开了一种用于便于从基底去除缺陷的系统和方法。 在基板的表面，例如以电离气体的形式施加电荷，以减弱缺陷和基板之间的吸引力。 作为吸引力减弱的结果，可以采用合适的缺陷去除系统来去除缺陷。

    Conducting electron beam resist thin film layer for patterning of mask plates
    43.
    发明授权
    Conducting electron beam resist thin film layer for patterning of mask plates 失效
    用于掩模板图形化的导电电子束抗蚀剂薄膜层

    公开(公告)号：US06482558B1

    公开(公告)日：2002-11-19

    申请号：US09782382

    申请日：2001-02-12

    申请人： Bhanwar Singh ,  Ramkumar Subramanian ,  Bharath Rangarajan

    发明人： Bhanwar Singh ,  Ramkumar Subramanian ,  Bharath Rangarajan

    IPC分类号： G03F900

    CPC分类号： G03F7/093 ,  G03F1/40 ,  G03F1/50 ,  Y10S430/143

    摘要： One aspect of the present invention relates to a system for dissipating electrostatic charge on a mask plate structure containing the mask plate structure containing a substrate, a chromium layer over the substrate, and a conductive polymer over the chromium layer; a conductive structure coupled to the mask plate structure which allows accumulated electrostatic charge to flow from the mask plate structure; a conductive path between the conductive structure and a ground, wherein the conductive path inacludes a switch controlled by a controller; and a detector coupled to the controller for signaling the controller when the accumulation of electrostatic charge is detected. Another aspect of the present invention relates to a method for dissipating charge accumulation during patterning of mask plates using a conductive polymer layer involving the steps of providing a mask substrate having a chromium layer; depositing a conductive polymer layer over the chromium layer; connecting a conductive structure to the mask substrate; irradiating portions of the mask substrate with an electron beam; detecting whether electrostatic charge exists on the mask substrate; and if electrostatic charge is detected, closing a circuit whereby the conductive structure is grounded to permit a flow of electrostatic charge from the mask substrate to the ground.

    摘要翻译： 本发明的一个方面涉及一种用于在掩模板结构上耗散静电电荷的系统，该系统包含含有衬底的掩模板结构，在衬底上的铬层和在铬层上的导电聚合物; 耦合到掩模板结构的导电结构，其允许积聚的静电电荷从掩模板结构流动; 导电结构和地之间的导电路径，其中导电路径不允许由控制器控制的开关; 以及耦合到控制器的检测器，用于在检测到静电电荷的累积时用于发信号通知控制器。 本发明的另一方面涉及一种使用导电聚合物层在掩模板图案化期间耗散电荷累积的方法，包括以下步骤：提供具有铬层的掩模基板; 在所述铬层上沉积导电聚合物层; 将导电结构连接到所述掩模基板; 用电子束照射掩模基板的部分; 检测在掩模基板上是否存在静电电荷; 并且如果检测到静电电荷，则关闭电路，由此导电结构接地以允许静电电荷从掩模基板流到地面。

    Method to produce small space pattern using plasma polymerization layer
    46.
    发明授权
    Method to produce small space pattern using plasma polymerization layer 失效
    使用等离子体聚合层产生小空间图案的方法

    公开(公告)号：US06416933B1

    公开(公告)日：2002-07-09

    申请号：US09283889

    申请日：1999-04-01

    申请人： Bhanwar Singh ,  Bharath Rangarajan ,  Wenge Yang

    发明人： Bhanwar Singh ,  Bharath Rangarajan ,  Wenge Yang

    IPC分类号： G03C500

    CPC分类号： H01L21/32139 ,  H01L21/0276 ,  H01L21/0337 ,  H01L21/0338 ,  H01L21/31138 ,  H01L21/31144 ,  H01L21/312

    摘要： The present invention relates to a method for forming an etch mask. A photoresist layer is patterned, wherein d1 is a smallest space dimension of an exposed area of a layer underlying the photoresist layer. A polymer layer is formed to be conformal to the patterned photoresist layer and exposed portions of the underlayer. The polymer layer is etched to form polymer sidewalls, the polymer sidewalls reducing the smallest space dimension of the exposed underlayer area to d2, wherein d2

    摘要翻译： 本发明涉及一种形成蚀刻掩模的方法。 图案化光致抗蚀剂层，其中d1是光致抗蚀剂层下面的层的暴露区域的最小空间尺寸。 聚合物层被形成为与图案化的光致抗蚀剂层和底层的暴露部分共形。 蚀刻聚合物层以形成聚合物侧壁，聚合物侧壁将暴露的底层区域的最小空间尺寸减小到d2，其中d2

    Multiple nozzles for dispensing resist
    47.
    发明授权
    Multiple nozzles for dispensing resist 有权
    用于分配抗蚀剂的多个喷嘴

    公开(公告)号：US06376013B1

    公开(公告)日：2002-04-23

    申请号：US09413143

    申请日：1999-10-06

    申请人： Bharath Rangarajan ,  Bhanwar Singh ,  Sanjay K. Yedur ,  Michael K. Templeton

    发明人： Bharath Rangarajan ,  Bhanwar Singh ,  Sanjay K. Yedur ,  Michael K. Templeton

    IPC分类号： B05D100

    CPC分类号： H01L21/6715 ,  B05B7/0408 ,  B05C11/02 ,  B05C11/08 ,  G03F7/162

    摘要： A system and method is provided that facilitates the application of a uniform layer of photoresist material spincoated onto a semiconductor substrate (e.g wafer). The present invention accomplishes this end by utilizing a measurement system that measures the thickness uniformity of the photoresist material applied on a test wafer by a nozzle, and then adjusting the viscosity of the photoresist material by varying the ratio in a solvent/resist mixture, and/or adjusting the temperature of the mixture. A system and method that employs a plurality of nozzles is also provided that disperses resist at different annular regions on a wafer to facilitate the application of a uniform layer of photoresist material spincoated onto the wafer. The system and method utilize a measurement system that measures the thickness and thickness uniformity of each layer of photoresist material applied at each annular region of the wafer. The measured thickness uniformity and overall thickness for each annular region is then used to adjust the volume and viscosity of a solvent/resist mixture applied through each nozzle.

    摘要翻译： 提供了一种系统和方法，其有利于将均匀的光致抗蚀剂材料层涂覆在半导体衬底（例如晶片）上。 本发明通过利用测量系统来实现这一目的，测量系统通过喷嘴测量施加在测试晶片上的光致抗蚀剂材料的厚度均匀性，然后通过改变溶剂/抗蚀剂混合物中的比例来调节光致抗蚀剂材料的粘度，以及 /或调整混合物的温度。 还提供了使用多个喷嘴的系统和方法，其将抗蚀剂分散在晶片上的不同环形区域，以便于将均匀的光致抗蚀剂材料层涂覆在晶片上。 该系统和方法利用测量系统，其测量在晶片的每个环形区域施加的每层光致抗蚀剂材料的厚度和厚度均匀性。 然后使用测量的每个环形区域的厚度均匀性和总厚度来调节通过每个喷嘴施加的溶剂/抗蚀剂混合物的体积和粘度。

    Reverse lithographic process for semiconductor spaces
    49.
    发明授权
    Reverse lithographic process for semiconductor spaces 有权
    半导体空间反向光刻工艺

    公开(公告)号：US06277544B1

    公开(公告)日：2001-08-21

    申请号：US09329153

    申请日：1999-06-09

    申请人： Bhanwar Singh ,  Bharath Rangarajan ,  Ursula Q. Quinto

    发明人： Bhanwar Singh ,  Bharath Rangarajan ,  Ursula Q. Quinto

    IPC分类号： G03C500

    CPC分类号： G03F7/0035 ,  G03F7/40 ,  H01L21/76838

    摘要： A reverse lithographic process is provided for more densely packing semiconductors onto a semiconductor wafer. A semiconductor wafer having deposited a number of layers of semiconductor materials has a photoresist deposited which is patterned with the spaces as lines, and then developed and trimmed. A polymer is deposited over the space photoresist structures and, when hardened, is subject to planarizing to expose the photoresist. The photoresist is removed leaving a reverse image polymer which is then used as a mask to anisotropically etch the spaces to form the closely spaced devices.

    摘要翻译： 提供反向光刻工艺用于在半导体晶片上更密集地堆叠半导体。 已经沉积了多层半导体材料的半导体晶片具有沉积的光致抗蚀剂，其以空间为线图案化，然后显影和修整。 聚合物沉积在空间光致抗蚀剂结构上，并且当硬化时，进行平面化以暴露光致抗蚀剂。 去除光致抗蚀剂留下反向图像聚合物，然后将其用作掩模以各向异性地蚀刻空间以形成紧密间隔的装置。

    Deposition of an oxide layer to facilitate photoresist rework on polygate layer
    50.
    发明授权
    Deposition of an oxide layer to facilitate photoresist rework on polygate layer 有权
    沉积氧化物层以促进多晶硅层上的光致抗蚀剂返修

    公开(公告)号：US06191046B1

    公开(公告)日：2001-02-20

    申请号：US09266362

    申请日：1999-03-11

    申请人： Bhanwar Singh ,  Sanjay K. Yedur ,  Bharath Rangarajan

    发明人： Bhanwar Singh ,  Sanjay K. Yedur ,  Bharath Rangarajan

    IPC分类号： H01L21302

    CPC分类号： H01L21/31133 ,  H01L21/0276 ,  H01L21/0332 ,  H01L21/0337

    摘要： A method of reworking a photoresist used to pattern a semiconductor structure is provided. A dielectric layer is formed over an anti-reflective coating, the anti-reflective coating covering a first underlayer, the first underlayer covering a second underlayer. A first photoresist layer is formed and patterened over the dielectric layer to yield a desired photoresist pattern. An undesired feature in the patterned first photoresist layer is determined. The patterned first photoresist layer is removed. A second photoresist layer is formed and patterned over the dielectric layer. Exposed portions of the dielectric layer, the anti-reflective coating and the first underlayer are etched. A thin photoresist layer is formed over exposed portions of the second underlayer. A CMP process is performed to remove the dielectric layer. The thin photoresist layer is stripped.

    摘要翻译： 提供了对用于图案化半导体结构的光致抗蚀剂进行返工的方法。 在抗反射涂层上形成电介质层，抗反射涂层覆盖第一底层，第一底层覆盖第二底层。 形成第一光致抗蚀剂层，并在电介质层上涂覆以产生所需的光致抗蚀剂图案。 确定图案化的第一光致抗蚀剂层中的不期望的特征。 去除图案化的第一光致抗蚀剂层。 在介电层上形成并图案化第二光致抗蚀剂层。 蚀刻介电层，抗反射涂层和第一底层的露出部分。 在第二底层的暴露部分上形成薄的光致抗蚀剂层。 执行CMP处理以去除电介质层。 剥去薄的光致抗蚀剂层。