Abstract:
A chip-type antenna for receiving FM broadcasting signal includes a ceramic substrate, a ferrite layer formed on a top surface of the ceramic substrate, and a radiation structure. The ceramic substrate and the ferrite layer form an antenna substrate. The radiation structure is formed on the antenna substrate. The chip-type antenna for receiving FM broadcasting signal utilizes the high dielectric constant of the ceramic substrate and the electric characteristic of the ferrite layer to reduce the dimension of the antenna.
Abstract:
An LED fixture include a mask structure and an LED module. The mask structure includes a cooling fin set of buckling type, an upper socket and a lower socket. The cooling fin set is constituted by a plurality of cooling fins that are encircled and inter-buckled to each other. An interior enclosed by the cooling fin set is formed into an accommodating space and a fitting hole connecting the accommodating space. The upper socket is assembled to one side of the fitting hole, while the lower socket is assembled to another side of the fitting hole. Meanwhile, the upper socket and the lower socket are respectively fastened by the cooling fin set through a clipping-and-abutting manner. The LED module is arranged by accommodating in the accommodating space and is connected to the cooling fin set as well. Accordingly, the entirely cooling effectiveness is promoted and the using lifetime is prolonged.
Abstract:
The present invention is a memory writing interference test system and method thereof. The test system comprises a memory, a progressing unit, a write-in unit, a read-out unit, and a discriminating unit. By sequentially writing data and then reading out the written data from one memory block after one through the whole memory, determines if the memory has the memory writing interference.
Abstract:
The present invention discloses a system for sharing a storage device among controllers, which includes a first controller and a second controller connected with each other, and both connected to a storage device including a plurality of logical unit numbers. The controllers detect their respective logical unit numbers and define the respective logical unit number detected by an opposite party as a virtual logical unit number. The controllers separately have a resource allocation unit for specifying the logical unit numbers to perform data accesses for the controllers and define a virtual identification for each virtual logical unit number based on an identification number thereof. If the first controller accesses data in a logical unit number detected by the second controller and requests the second controller to perform a data access of the respective virtual logical unit number thereof based on the virtual identification number, the second controller will search for a matched virtual logical unit number to perform the data access and return the access result to the first controller.
Abstract:
A RAID capacity expansion interruption recovery handling method and system is proposed, which is designed for use with a RAID (Redundant Array of Independent Disks) unit for providing a capacity-expansion interruption recovery function that allows the RAID unit to recover after an event of an unexpected interruption to a capacity-expansion procedure that builds data from an original disk set to a newly-added disk. The proposed method and system is characterized by the capability of continuously recording the addresses of blocks that have been rebuilt in the original disk set and the newly-added disk to a permanent storage medium, such that in the event of any unexpected interruption, the address of the last block that has been rebuilt can be stored as a checkpoint. After the RAID unit is reset, the checkpoint can then be used as a recovery point for the uncompleted capacity expansion procedure without having to restart all over again from the beginning point. This feature allows the recovery of capacity expansion after unexpected interruption to be carried out more efficiently with enhanced system performance.
Abstract:
The present invention is to provide a system for backing up cache memory in a double backup server structure, which comprises a first backup server having a first SAS controller; a second backup server having a second SAS controller; and a SAS channel for connecting said first and second SAS controllers; wherein said first SAS controller and said second SAS controller each having a sending end initiator defining a cache mirror command. When said first backup server received a write command and write data through a Fiber Channel or iSCSI channel into a first cache memory, said first SAS controller also establishes a first Command Descriptor Block (CDB) with an operation code of a cache mirror command as well as a first data header for the cache data. Said first CDB and first data header are subsequently transmitted through said SAS channel to said second SAS controller and said second backup server writes said data into a second cache memory of its own. Accordingly, with the higher bandwidth facilitated by the SAS channel, considerable amount of cache data can be processes in high speed to improve the storage efficiency in a double backup server structure.
Abstract:
The present invention relates to a method of providing a real time solution to an error occurred when a computer is turned on, which enables a BIOS installed in the computer to test all hardware equipment of the computer and record any detected error, and also enables the BIOS to show a solution corresponding to the error on a display connected to the computer through pressing a function key of an input device coupled to the computer while the test is finished.
Abstract:
A color compensation method for a display is disclosed. The display includes a display module for receiving a plurality of original pixel data. The method includes calculating power-on time duration of the display module; and adjusting gray levels of the original pixel data according to the power-on time duration.
Abstract:
A shared-IRQ user-defined interrupt signal handling method and system is proposed, which is designed for use with a computer platform to allow a group of peripheral devices connected to an interrupt-configurable peripheral interface to share system interrupt lines IRQ with another group of peripheral devices connected to an interrupt nonconfigurable peripheral interface; which is characterized by the provision of an interrupt configuration table for defining a virtual device for the interrupt-configurable peripheral interface as well as each specific system interrupt line that is shared by the two groups of peripheral devices. This feature allows system interrupt lines IRQ to be shared by the two different groups of peripheral devices, and also allows the implementation to be easier to carried out than prior art without involving complex and difficult BIOS coding.
Abstract:
A storage server embedded code backup method and system is provided, which is designed for use with a storage server for backup of the storage server's embedded code stored in a system memory module, so that in the event of the embedded code being corrupted, it can provide a backup recovery to the corrupted code to allow the storage server to resume normal operation. The proposed method and system is characterized by that the storage space of the storage server's inherent mass storage unit, such as RAID unit, is utilized to be partitioned into a backup region for storage of a duplicated copy of the storage server's embedded code for backup recovery when the storage server's embedded code is corrupted. Since RAID unit is an inherent device of storage server, no additional hardware is required for the implementation of the proposed method and system, which represents a cost effective backup-and-recovery solution to the storage server.