Abstract:
A memory device includes a memory cell. The memory cell includes: a bipolar memory element and a bidirectional switching element. The bidirectional switching element is connected to ends of the bipolar memory element, and has a bidirectional switching characteristic. The bidirectional switching element includes: a first switching element and a second switching element. The first switching element is connected to a first end of the bipolar memory element and has a first switching direction. The second switching element is connected to a second end of the bipolar memory element and has a second switching direction. The second switching direction is opposite to the first switching direction.
Abstract:
In a method of operating a semiconductor device, a resistance value of a variable resistance element is changed from a first resistance value to a second resistance value by applying a first voltage to the variable resistance element; and a first current that flows through the variable resistance element is sensed. A second voltage for changing the resistance value of the variable resistance element from the second resistance value to the first resistance value is modulated based on a dispersion of the first current, and the first voltage is re-applied to the variable resistance element based on a dispersion of the first current.
Abstract:
A non-volatile memory element includes: a memory layer disposed between a first electrode and a second electrode; and a buffer layer disposed between the memory layer and the first electrode. The memory layer includes a first material layer and a second material layer. The first material layer and the second material layer are configured to exchange ionic species to change a resistance state of the memory layer.
Abstract:
Example embodiments, relate to a non-volatile memory element and a memory device including the same. The non-volatile memory element may include a memory layer having a multi-layered structure between two electrodes. The memory layer may include first and second material layers and may show a resistance change characteristic due to movement of ionic species therebetween. The first material layer may be an oxygen-supplying layer. The second material layer may be an oxide layer having a multi-trap level.
Abstract:
Bipolar memory cells and a memory device including the same are provided, the bipolar memory cells include two bipolar memory layers having opposite programming directions. The two bipolar memory layers may be connected to each other via an intermediate electrode interposed therebetween. The two bipolar memory layers may have the same structure or opposite structures.
Abstract:
Provided is a resistance random access memory (RRAM) device and a method of manufacturing the same. A resistance random access memory (RRAM) device may include a lower electrode, a first oxide layer on the lower electrode and storing information using two resistance states, a current control layer made of a second oxide on the first oxide layer and an upper electrode on the current control layer.
Abstract:
A burst-mode optical receiver is provided. The burst-mode optical receiver includes a preamplifier, a post-amplifier integrated into one body together with the preamplifier, and an operation controller for controlling operation of the preamplifier and the post-amplifier using an external reset signal input from a single external reset input terminal. As a result, it is possible to implement a burst-mode receiver for a gigabit-capable passive optical network (GPON) in which a preamplifier unit and a post-amplifier unit are integrated.
Abstract:
A resistive random access memory (RRAM) includes a resistive memory layer of a transition metal oxide, such as Ni oxide, and is doped with a metal material. The RRAM may include at least one first electrode, a resistive memory layer on the at least one first electrode, the resistive memory layer including a Ni oxide layer doped with at least one element selected from a group consisting of Fe, Co, and Sn, and at least one second electrode on the resistive memory layer. The RRAM device may include a plurality of first electrodes and a plurality of second electrodes, and the resistive memory layer may be between the plurality of first electrodes and the plurality of second electrodes.
Abstract:
Disclosed is a method of registering only an authorized optical network terminal among a plurality of optical network terminals with the same serial number, in an optical line terminal, using a public key encryption algorithm, in a Gigabit Passive Optical Network (GPON). According to an exemplary aspect, a GPON system encrypts a physical layer OAM message transmitted/received for serial number registration of an optical network terminal, using a key distributed according to a public key encryption algorithm, and authenticates registration of the optical network terminal using the encrypted physical layer OAM message. Accordingly, it is possible to securely authenticate registration of an authorized optical network terminal and block registration of unauthorized optical network terminals.
Abstract:
A direct memory access controlling method includes checking a length value of remaining data corresponding to data remaining after transmission of the data stored in the source memory to the destination memory, and a currently set burst length value, comparing the length value of the remaining data with the currently set burst length value based on a result of the checking, and selectively changing the currently set burst length value based on a result of the comparing, and transmitting data to the destination memory.