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公开(公告)号：US11887665B2
公开(公告)日：2024-01-30
申请号：US17720542
申请日：2022-04-14
发明人： Hari Giduturi
CPC分类号： G11C13/0069 , G11C13/003 , G11C2013/0078 , G11C2213/15 , G11C2213/73
摘要： The present disclosure includes apparatuses, methods, and systems for memory cell programming that cancels threshold voltage drift. An embodiment includes a memory having a plurality of memory cells, and circuitry configured to program a memory cell of the plurality of memory cells to one of two possible data states by applying a first voltage pulse to the memory cell, wherein the first voltage pulse has a first polarity and a first magnitude, and applying a second voltage pulse to the memory cell, wherein the second voltage pulse has a second polarity that is opposite the first polarity and a second magnitude that can be greater than the first magnitude.
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公开(公告)号：US20190221613A1
公开(公告)日：2019-07-18
申请号：US16362615
申请日：2019-03-23
申请人： Nantero, Inc.
CPC分类号： H01L27/285 , G11C13/0069 , G11C13/0097 , G11C2213/35 , G11C2213/73 , H01L27/2409 , H01L27/2463 , H01L29/02 , H01L45/04 , H01L45/1233 , H01L45/149 , H01L45/1608 , H01L45/165 , H01L45/1675 , H01L51/0046 , H01L51/0048 , H01L51/0579
摘要： The present disclosure is directed toward carbon based diodes, carbon based resistive change memory elements, resistive change memory having resistive change memory elements and carbon based diodes, methods of making carbon based diodes, methods of making resistive change memory elements having carbon based diodes, and methods of making resistive change memory having resistive change memory elements having carbons based diodes. The carbon based diodes can be any suitable type of diode that can be formed using carbon allotropes, such as semiconducting single wall carbon nanotubes (s-SWCNT), semiconducting Buckminsterfullerenes (such as C60 Buckyballs), or semiconducting graphitic layers (layered graphene). The carbon based diodes can be pn junction diodes, Schottky diodes, other any other type of diode formed using a carbon allotrope. The carbon based diodes can be placed at any level of integration in a three dimensional (3D) electronic device such as integrated with components or wiring layers.
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公开(公告)号：US20190006006A1
公开(公告)日：2019-01-03
申请号：US16105874
申请日：2018-08-20
IPC分类号： G11C13/00
CPC分类号： G11C13/0069 , G11C13/0004 , G11C13/0026 , G11C13/0028 , G11C13/0033 , G11C13/004 , G11C13/0097 , G11C2013/0052 , G11C2013/0073 , G11C2013/0092 , G11C2213/73 , G11C2213/76
摘要： Disclosed herein is a memory cell including a memory element and a selector device. The memory cell may be programmed with a programming pulse having a first polarity and read with a read pulse having a second polarity. The memory cell may be programmed with a programming pulse having first and second portions. The first and second portions may have different magnitudes and polarities. The memory cell may exhibit reduced voltage drift and/or threshold voltage distribution. Described herein is a memory cell that acts as both a memory element and a selector device. The memory cell may be programmed with a programming pulse having first and second portions. The first and second portions may have different magnitudes and polarities.
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公开(公告)号：US10079060B2
公开(公告)日：2018-09-18
申请号：US15495574
申请日：2017-04-24
申请人： Crossbar, Inc.
发明人： Sung Hyun Jo , Hagop Nazarian , Lin Shih Liu
CPC分类号： G11C13/004 , G11C11/1659 , G11C11/1673 , G11C13/0002 , G11C13/003 , G11C13/0033 , G11C13/0061 , G11C14/00 , G11C14/0045 , G11C29/026 , G11C29/028 , G11C2013/0071 , G11C2213/51 , G11C2213/73 , G11C2213/76
摘要： Providing for improved sensing of non-volatile resistive memory to achieve higher sensing margins, is described herein. The sensing can leverage current-voltage characteristics of a volatile selector device within the resistive memory. A disclosed sensing process can comprise activating the selector device with an activation voltage, and then lowering the activation voltage to a holding voltage at which the selector device deactivates for an off-state memory cell, but remains active for an on-state memory cell. Accordingly, very high on-off ratio characteristics of the selector device can be employed for sensing the resistive memory, providing sensing margins not previously achievable for non-volatile memory.
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公开(公告)号：US20180175109A1
公开(公告)日：2018-06-21
申请号：US15796919
申请日：2017-10-30
发明人： Hye-jin CHOI , Jung-ik OH , Bok-yeon WON , Gwang-hyun BAEK
CPC分类号： H01L27/2463 , G11C13/0002 , G11C13/0004 , G11C13/0007 , G11C13/003 , G11C13/0069 , G11C2213/15 , G11C2213/32 , G11C2213/35 , G11C2213/51 , G11C2213/52 , G11C2213/72 , G11C2213/73 , H01L27/2409 , H01L27/2418 , H01L27/2427 , H01L27/2481 , H01L45/04 , H01L45/06 , H01L45/08 , H01L45/1233 , H01L45/1246 , H01L45/126 , H01L45/142 , H01L45/143 , H01L45/144 , H01L45/146 , H01L45/148
摘要： A variable resistance memory device including a first electrode line; a cell structure including a variable resistance layer on the first electrode line and a first blocking layer protecting the variable resistance layer; and a second electrode line on the cell structure, wherein the first blocking layer is on at least one of an upper surface, a lower surface, and the upper and lower surfaces of the variable resistance layer, and the first blocking layer includes a metal layer or a carbon-containing conductive layer.
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公开(公告)号：US20180122472A1
公开(公告)日：2018-05-03
申请号：US15841118
申请日：2017-12-13
IPC分类号： G11C13/00
CPC分类号： G11C13/0069 , G11C13/0004 , G11C13/0026 , G11C13/0028 , G11C13/0033 , G11C13/004 , G11C13/0097 , G11C2013/0052 , G11C2013/0073 , G11C2013/0092 , G11C2213/73 , G11C2213/76
摘要： Disclosed herein is a memory cell including a memory element and a selector device. The memory cell may be programmed with a programming pulse having a first polarity and read with a read pulse having a second polarity. The memory cell may be programmed with a programming pulse having first and second portions. The first and second portions may have different magnitudes and polarities. The memory cell may exhibit reduced voltage drift and/or threshold voltage distribution. Described herein is a memory cell that acts as both a memory element and a selector device. The memory cell may be programmed with a programming pulse having first and second portions. The first and second portions may have different magnitudes and polarities.
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公开(公告)号：US20180033826A1
公开(公告)日：2018-02-01
申请号：US15446024
申请日：2017-03-01
发明人： Seol Choi , Hideki Horii , Dong-ho Ahn , Seong-geon Park , Dong-jun Seong , Min-kyu Yang , Jung-moo Lee
CPC分类号： H01L27/2427 , G11C13/0004 , G11C13/0026 , G11C13/0028 , G11C13/003 , G11C2213/52 , G11C2213/71 , G11C2213/72 , G11C2213/73 , G11C2213/76 , H01L27/2463 , H01L27/2481 , H01L45/04 , H01L45/06 , H01L45/1233 , H01L45/1253 , H01L45/126 , H01L45/143 , H01L45/144 , H01L45/1675
摘要： A variable resistance memory device may include: a first electrode layer; a selection device layer on the first electrode layer, the selection device layer including a chalcogenide switching material consisting essentially of germanium (Ge), selenium (Se), and antimony (Sb), wherein a content of the Ge is less than a content of the Se based on an atomic weight; a second electrode layer on the selection device layer; a variable resistance layer on the second electrode layer, the variable resistance layer including a chalcogenide material; and a third electrode layer on the variable resistance layer.
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公开(公告)号：US09633724B2
公开(公告)日：2017-04-25
申请号：US14755998
申请日：2015-06-30
申请人： Crossbar, Inc.
发明人： Sung Hyun Jo , Hagop Nazarian , Lin Shih Liu
CPC分类号： G11C13/004 , G11C11/1659 , G11C11/1673 , G11C13/0002 , G11C13/003 , G11C13/0033 , G11C13/0061 , G11C14/00 , G11C14/0045 , G11C29/026 , G11C29/028 , G11C2013/0071 , G11C2213/51 , G11C2213/73 , G11C2213/76
摘要： Providing for improved sensing of non-volatile resistive memory to achieve higher sensing margins, is described herein. The sensing can leverage current-voltage characteristics of a volatile selector device within the resistive memory. A disclosed sensing process can comprise activating the selector device with an activation voltage, and then lowering the activation voltage to a holding voltage at which the selector device deactivates for an off-state memory cell, but remains active for an on-state memory cell. Accordingly, very high on-off ratio characteristics of the selector device can be employed for sensing the resistive memory, providing sensing margins not previously achievable for non-volatile memory.
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公开(公告)号：US20160351622A1
公开(公告)日：2016-12-01
申请号：US15114010
申请日：2014-01-31
发明人： Gary Gibson , Warren Jackson , R. Stanley Williams
CPC分类号： H01L27/2418 , G11C7/04 , G11C11/1659 , G11C13/0007 , G11C13/0023 , G11C13/003 , G11C2213/73 , G11C2213/76 , H01L45/00 , H01L45/1286 , H01L45/145
摘要： A circuit component that exhibits a region of negative differential resistance includes: a first layer of material; and a second layer of material in contact with the first layer of material, the contact forming a first self-heating interface. The first self-heating interface is structured such that an electrical current flowing from the first layer of material to the second layer of material encounters an electrical impedance occurring at the first interface that is greater than any electrical impedance occurring in the first and second layers of material, wherein heating occurring at the first interface is dominated by Joule heating caused by the electrical impedance occurring at the first interface, and wherein the electrical impedance occurring at the first interface decreases with increasing temperature to induce a region of negative differential resistance.
摘要翻译： 具有负差分电阻的区域的电路部件包括：第一层材料; 以及与所述第一材料层接触的第二材料层，所述接触件形成第一自加热界面。 第一自加热界面被构造成使得从第一材料层流向第二层材料的电流遇到在第一界面处发生的电阻抗大于在第一和第二层中发生的任何电阻抗 材料，其中在第一界面处发生的加热由由在第一界面处发生的电阻抗引起的焦耳加热主导，并且其中在第一界面处发生的电阻抗随温度升高而降低，以引起负差分电阻的区域。
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公开(公告)号：US20160267970A1
公开(公告)日：2016-09-15
申请号：US15031106
申请日：2013-10-29
发明人： Frederick Perner , Yoocharn Jeon
IPC分类号： G11C13/00
CPC分类号： G11C13/004 , G11C13/003 , G11C13/0069 , G11C2213/15 , G11C2213/72 , G11C2213/73
摘要： A method includes applying a voltage bump across a combined memory device comprising a volatile selector switch and a nonvolatile switch, in which the voltage bump changes a state of the volatile selector switch from a high resistance to a low resistance but does not change a state of the nonvolatile switch. A read voltage that is lower than the voltage bump across the combined memory device to read a state of the nonvolatile switch.
摘要翻译： 一种方法包括在包括易失性选择器开关和非易失性开关的组合存储器件中施加电压突起，其中电压凸起将易失性选择器开关的状态从高电阻改变为低电阻，但不改变 非易失性开关。 读取电压低于组合存储器件上的电压突起，以读取非易失性开关的状态。
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