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公开(公告)号:US11881523B2
公开(公告)日:2024-01-23
申请号:US17740725
申请日:2022-05-10
Applicant: GLOBALFOUNDRIES U.S. Inc.
Inventor: Shesh Mani Pandey , Vibhor Jain , Judson R. Holt
IPC: H01L29/737 , H01L29/10 , H01L29/66
CPC classification number: H01L29/7371 , H01L29/1004 , H01L29/66242
Abstract: The present disclosure relates to semiconductor structures and, more particularly, to heterojunction bipolar transistors and methods of manufacture. The structure includes: a subcollector under a buried insulator layer; a collector above the subcollector; a base within the buried insulator layer; an emitter above the base; and contacts to the subcollector, the base and the emitter.
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公开(公告)号:US11881395B2
公开(公告)日:2024-01-23
申请号:US17644939
申请日:2021-12-17
Applicant: GlobalFoundries U.S. Inc.
Inventor: Judson R. Holt , Hong Yu , Alexander M. Derrickson
IPC: H01L29/735 , H01L29/08 , H01L29/66 , H01L29/10
CPC classification number: H01L29/735 , H01L29/0808 , H01L29/0821 , H01L29/1008 , H01L29/6625
Abstract: Embodiments of the disclosure provide a lateral bipolar transistor on a semiconductor fin and methods to form the same. A bipolar transistor structure according to the disclosure may include a doped semiconductor layer coupled to a base contact. A first semiconductor fin on the doped semiconductor layer may have a first doping type. An emitter/collector (E/C) material may be on a sidewall of an upper portion of the first semiconductor fin. The E/C material has a second doping type opposite the first doping type. The E/C material is coupled to an E/C contact.
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公开(公告)号:US20230290868A1
公开(公告)日:2023-09-14
申请号:US17745178
申请日:2022-05-16
Applicant: GLOBALFOUNDRIES U.S. Inc.
Inventor: Hong Yu , Judson R. Holt , Vibhor Jain
IPC: H01L29/737 , H01L29/66 , H01L23/373
CPC classification number: H01L29/737 , H01L29/66242 , H01L23/3738
Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a bipolar transistor with thermal conductor and methods of manufacture. The structure includes: a base formed within a semiconductor substrate; a thermal conductive material under the base and extending to an underlying semiconductor material; an emitter on a first side of the base; and a collector on a second side of the base.
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公开(公告)号:US11695064B2
公开(公告)日:2023-07-04
申请号:US17176251
申请日:2021-02-16
Applicant: GLOBALFOUNDRIES U.S. Inc.
Inventor: Vibhor Jain , Judson R. Holt , Tayel Nesheiwat , John J. Pekarik , Christopher Durcan
IPC: H01L29/732 , H01L29/66 , H01L29/08 , H01L29/06
CPC classification number: H01L29/732 , H01L29/0649 , H01L29/0804 , H01L29/66272
Abstract: Device structures and fabrication methods for a bipolar junction transistor. The device structure includes a substrate and a trench isolation region in the substrate. The trench isolation region surrounds an active region of the substrate. The device structure further includes a collector in the active region of the substrate, a base layer having a first section positioned on the active region and a second section oriented at an angle relative to the first section, an emitter positioned on the first section of the base layer, and an extrinsic base layer positioned over the trench isolation region and adjacent to the emitter. The second section of the base layer is laterally positioned between the extrinsic base layer and the emitter.
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公开(公告)号:US20230069207A1
公开(公告)日:2023-03-02
申请号:US17524043
申请日:2021-11-11
Applicant: GlobalFoundries U.S. Inc.
Inventor: Alexander Derrickson , Judson R. Holt , Haiting Wang , Jagar Singh , Vibhor Jain
IPC: H01L29/10 , H01L29/08 , H01L29/66 , H01L29/735 , H01L29/737
Abstract: Structures for a bipolar junction transistor and methods of forming a structure for a bipolar junction transistor. The structure includes an emitter having a raised portion, a collector having a raised portion, and a base having a base layer and an extrinsic base layer stacked with the base layer. The base layer and the extrinsic base layer are positioned in a lateral direction between the raised portion of the emitter and the raised portion of the collector, the base layer has a first width in the lateral direction, the extrinsic base layer has a second width in the lateral direction, and the second width is greater than the first width.
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公开(公告)号:US20230067486A1
公开(公告)日:2023-03-02
申请号:US17525256
申请日:2021-11-12
Applicant: GLOBALFOUNDRIES U.S. Inc.
Inventor: Alexander Derrickson , Vibhor Jain , Judson R. Holt , Jagar Singh , Mankyu Yang
IPC: H01L29/08 , H01L29/735 , H01L29/737 , H01L29/06 , H01L29/10 , H01L29/417
Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a lateral bipolar transistor with gated collector and methods of manufacture. The structure includes: an extrinsic base region vertically over a semiconductor substrate and comprising asymmetrical sidewall spacers on opposing sidewalls of the extrinsic base region; a collector region on the semiconductor substrate and separated from the extrinsic base region by at least a first spacer of the asymmetrical sidewall spacers; and an emitter region on the semiconductor substrate and separated from the extrinsic base region by a second spacer of the asymmetrical sidewall spacers.
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公开(公告)号:US20230066963A1
公开(公告)日:2023-03-02
申请号:US17537564
申请日:2021-11-30
Applicant: GlobalFoundries U.S. Inc.
Inventor: Hong Yu , Judson R. Holt , Zhenyu Hu
IPC: H01L29/10 , H01L29/165 , H01L29/735 , H01L29/737 , H01L29/66
Abstract: In a disclosed semiconductor structure, a lateral bipolar junction transistor (BJT) has a base positioned laterally between a collector and an emitter. The base includes a semiconductor fin with a first portion that extends from a substrate through an isolation layer, a second portion on the first portion, and a third portion on the second portion. The collector and emitter are on the isolation layer and positioned laterally immediately adjacent to opposing sidewalls of the second portion of the semiconductor fin. In some embodiments, the BJT is a standard BJT where the semiconductor fin (i.e., the base), the collector, and the emitter are made of the same semiconductor material. In other embodiments, the BJT is a heterojunction bipolar transistor (HBT) where a section of the semiconductor fin (i.e., the base) is made of a different semiconductor material for improved performance. Also disclosed is a method of forming the structure.
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公开(公告)号:US20230062013A1
公开(公告)日:2023-03-02
申请号:US17644939
申请日:2021-12-17
Applicant: GlobalFoundries U.S. Inc.
Inventor: Judson R. Holt , Hong Yu , Alexander M. Derrickson
IPC: H01L29/735 , H01L29/08 , H01L29/10 , H01L29/66
Abstract: Embodiments of the disclosure provide a lateral bipolar transistor on a semiconductor fin and methods to form the same. A bipolar transistor structure according to the disclosure may include a doped semiconductor layer coupled to a base contact. A first semiconductor fin on the doped semiconductor layer may have a first doping type. An emitter/collector (E/C) material may be on a sidewall of an upper portion of the first semiconductor fin. The E/C material has a second doping type opposite the first doping type. The E/C material is coupled to an E/C contact.
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公开(公告)号:US20230057695A1
公开(公告)日:2023-02-23
申请号:US17509327
申请日:2021-10-25
Applicant: GLOBALFOUNDRIES U.S. Inc.
Inventor: Vibhor Jain , Alvin J. Joseph , Alexander Derrickson , Judson R. Holt , John J. Pekarik
IPC: H01L29/08 , H01L29/735 , H01L29/417 , H01L29/66
Abstract: The present disclosure relates to semiconductor structures and, more particularly, to lateral bipolar transistors and methods of manufacture. The structure includes: an extrinsic base comprising semiconductor material; an intrinsic base comprising semiconductor material which is located below the extrinsic base; a polysilicon emitter on a first side of the extrinsic base; a raised collector on a second side of the extrinsic base; and sidewall spacers on the extrinsic base which separate the extrinsic base from the polysilicon emitter and the raised collector.
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50.
公开(公告)号:US11502200B2
公开(公告)日:2022-11-15
申请号:US16906490
申请日:2020-06-19
Applicant: GLOBALFOUNDRIES U.S. Inc.
Inventor: Sipeng Gu , Judson R. Holt , Haiting Wang , Yanping Shen
IPC: H01L29/78 , H01L29/08 , H01L29/06 , H01L29/66 , H01L21/8234
Abstract: An illustrative transistor device disclosed herein includes a gate structure positioned around a portion of a fin defined in a semiconductor substrate and epitaxial semiconductor material positioned on the fin in a source/drain region of the transistor device, wherein the epitaxial semiconductor material has a plurality of lower angled surfaces. In this example, the device further includes a first sidewall spacer positioned adjacent the gate structure, wherein a first portion of the first sidewall spacer is also positioned on and in physical contact with at least a portion of the lower angled surfaces of the epitaxial semiconductor material.
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