RAPID MULTI-LEVEL QUBIT RESET
    41.
    发明申请

    公开(公告)号:US20250068959A1

    公开(公告)日:2025-02-27

    申请号:US18941942

    申请日:2024-11-08

    Applicant: Google LLC

    Abstract: Methods, systems and apparatus for resetting a qubit. In one aspect, an apparatus includes a qubit, wherein the state of the qubit occupies a plurality of levels comprising two computational levels and one or more non-computational levels; a resonator that operates at a resonator frequency; control electronics that control a frequency of the qubit such that during a reset operation the qubit frequency is adjusted from a holding frequency that is lower than the resonator frequency to an idling frequency that is higher than the resonator frequency, and during the adjustment a first derivative of the qubit frequency at a first time is positive, at a second time that occurs after the first time is zero, and at a third time that occurs after the second time is positive, where the qubit frequency achieves the idling frequency at a fourth time that occurs after the third time.

    Reducing parasitic capacitance in a qubit system

    公开(公告)号:US12069969B2

    公开(公告)日:2024-08-20

    申请号:US18139288

    申请日:2023-04-25

    Applicant: Google LLC

    Inventor: Rami Barends

    CPC classification number: H10N69/00 G06N10/00 H01P3/003 H10N60/12 H10N60/855

    Abstract: A system that includes: an array of qubits, each qubit of the array of qubits comprising a first electrode corresponding to a first node and a second electrode corresponding to a second node, wherein, for a first qubit in the array of qubits, the first qubit is positioned relative to a second qubit in the array of qubits such that a charge present on the first qubit induces a same charge on each of the first node of the second qubit and the second node of the second qubit, such that coupling between the first qubit and the second qubit is reduced, and wherein none of the nodes share a common ground is disclosed.

    Reducing parasitic interactions in a qubit grid for surface code error correction

    公开(公告)号:US12056575B2

    公开(公告)日:2024-08-06

    申请号:US18238944

    申请日:2023-08-28

    Applicant: Google LLC

    CPC classification number: G06N10/00 H03K19/177

    Abstract: Methods and systems for performing a surface code error detection cycle. In one aspect, a method includes initializing and applying Hadamard gates to multiple measurement qubits; performing entangling operations on a first set of paired qubits, wherein each pair comprises a measurement qubit coupled to a neighboring data qubit in a first direction; performing entangling operations on a second set of paired qubits, wherein each pair comprises a measurement qubit coupled to a neighboring data qubit in a second or third direction, the second and third direction being perpendicular to the first direction, the second direction being opposite to the third direction; performing entangling operations on a third set of paired qubits, wherein each pair comprises a measurement qubit coupled to a neighboring data qubit in a fourth direction, the fourth direction being opposite to the first direction; applying Hadamard gates to the measurement qubits; and measuring the measurement qubits.

    REDUCING PARASITIC INTERACTIONS IN A QUBIT GRID FOR SURFACE CODE ERROR CORRECTION

    公开(公告)号:US20240062086A1

    公开(公告)日:2024-02-22

    申请号:US18238944

    申请日:2023-08-28

    Applicant: Google LLC

    CPC classification number: G06N10/00 H03K19/177

    Abstract: Methods and systems for performing a surface code error detection cycle. In one aspect, a method includes initializing and applying Hadamard gates to multiple measurement qubits; performing entangling operations on a first set of paired qubits, wherein each pair comprises a measurement qubit coupled to a neighboring data qubit in a first direction; performing entangling operations on a second set of paired qubits, wherein each pair comprises a measurement qubit coupled to a neighboring data qubit in a second or third direction, the second and third direction being perpendicular to the first direction, the second direction being opposite to the third direction; performing entangling operations on a third set of paired qubits, wherein each pair comprises a measurement qubit coupled to a neighboring data qubit in a fourth direction, the fourth direction being opposite to the first direction; applying Hadamard gates to the measurement qubits; and measuring the measurement qubits.

    Reducing parasitic capacitance in a qubit system

    公开(公告)号:US11672188B2

    公开(公告)日:2023-06-06

    申请号:US16977673

    申请日:2018-03-26

    Applicant: Google LLC

    Inventor: Rami Barends

    CPC classification number: H01L27/18 G06N10/00 H01L39/125 H01L39/223 H01P3/003

    Abstract: A system that includes: an array of qubits, each qubit of the array of qubits comprising a first electrode corresponding to a first node and a second electrode corresponding to a second node, wherein, for a first qubit in the array of qubits, the first qubit is positioned relative to a second qubit in the array of qubits such that a charge present on the first qubit induces a same charge on each of the first node of the second qubit and the second node of the second qubit, such that coupling between the first qubit and the second qubit is reduced, and wherein none of the nodes share a common ground is disclosed.

    REDUCING PARASITIC INTERACTIONS IN A QUBIT GRID FOR SURFACE CODE ERROR CORRECTION

    公开(公告)号:US20230169380A1

    公开(公告)日:2023-06-01

    申请号:US18095803

    申请日:2023-01-11

    Applicant: Google LLC

    CPC classification number: G06N10/00 H03K19/177

    Abstract: Methods and systems for performing a surface code error detection cycle. In one aspect, a method includes initializing and applying Hadamard gates to multiple measurement qubits; performing entangling operations on a first set of paired qubits, wherein each pair comprises a measurement qubit coupled to a neighboring data qubit in a first direction; performing entangling operations on a second set of paired qubits, wherein each pair comprises a measurement qubit coupled to a neighboring data qubit in a second or third direction, the second and third direction being perpendicular to the first direction, the second direction being opposite to the third direction; performing entangling operations on a third set of paired qubits, wherein each pair comprises a measurement qubit coupled to a neighboring data qubit in a fourth direction, the fourth direction being opposite to the first direction; applying Hadamard gates to the measurement qubits; and measuring the measurement qubits.

    Selective capping to reduce quantum bit dephasing

    公开(公告)号:US11348025B2

    公开(公告)日:2022-05-31

    申请号:US16474171

    申请日:2017-12-08

    Applicant: Google LLC

    Inventor: Rami Barends

    Abstract: A device includes: a substrate; a superconducting quantum interference device (SQUID) including a superconductor trace arranged on an upper surface of the substrate and having at least one Josephson junction interrupting a path of the superconductor trace, in which the superconductor trace includes a first superconductor material that exhibits superconducting properties at or below a corresponding superconducting critical temperature; and a dielectric capping layer on an upper surface of the SQUID, in which the dielectric capping layer covers a majority of the superconductor trace of the SQUID, and the capping layer includes an opening through which a first region of the SQUID is exposed, the first region of the SQUID including a first Josephson junction.

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