公开(公告)号：US20120230081A1

公开(公告)日：2012-09-13

申请号：US13415127

申请日：2012-03-08

申请人： Gael Close ,  Christoph Hagleitner ,  Angeliki Pantazi ,  Nikolaos Papandreou ,  Charalampos Pozidis ,  Abu Sebastian

发明人： Gael Close ,  Christoph Hagleitner ,  Angeliki Pantazi ,  Nikolaos Papandreou ,  Charalampos Pozidis ,  Abu Sebastian

IPC分类号： G11C11/00

CPC分类号： G11C5/147 ,  G11C11/5678 ,  G11C11/5685 ,  G11C13/0004 ,  G11C13/0007 ,  G11C13/004 ,  G11C13/0061 ,  G11C2211/5645

摘要： Apparatus and method for measuring the state of a resistive memory cell. A bias voltage controller applies a bias voltage to the cell and controls the level of the bias voltage. A feedback signal generator senses cell current due to the bias voltage and generates a feedback signal (SFB) dependent on the difference between the cell current and a predetermined target current. The bias voltage controller controls the bias voltage level in dependence on the feedback signal (SFB) such that the cell current converges on the target current. An output is provided indicative of the bias voltage level at which the cell current corresponds to the target current, thus providing a voltage-based metric for cell-state.

摘要翻译： 用于测量电阻式存储单元的状态的装置和方法。 偏置电压控制器向电池施加偏置电压并控制偏置电压的电平。 反馈信号发生器由于偏置电压而感测电池电流，并且根据电池电流和预定目标电流之间的差产生反馈信号（SFB）。 偏置电压控制器根据反馈信号（SFB）控制偏置电压电平，使得电池电流收敛于目标电流。 提供指示电池电流对应于目标电流的偏置电压电平的输出，从而为电池状态提供基于电压的度量。

公开(公告)号：US07885365B2

公开(公告)日：2011-02-08

申请号：US11848599

申请日：2007-08-31

申请人： Christoph Hagleitner ,  Christian I. Menolfi ,  Martin L. Schmatz ,  Thomas H. Toifl

发明人： Christoph Hagleitner ,  Christian I. Menolfi ,  Martin L. Schmatz ,  Thomas H. Toifl

IPC分类号： H04L7/00

CPC分类号： H03L7/07 ,  H03L7/0812 ,  H03L7/091 ,  H03L7/10 ,  H04L7/0008

摘要： A high-speed receiver includes multiple receiver components. Each receiver component includes sampling latches for receiving data, phase rotators for controlling timing of sampling of data by the sampling latches, and a clock-tracking logic stage for providing clock and data recovery. The clock-tracking logic stage is divided into a high-speed early/late (E/L) logic and aggregation counter section and a low-speed logic section, separated by a synchronization logic block. The receiver also includes a delay locked loop (DLL) for receiving an input clock signal corresponding to a data rate of the received data, providing coarse delay adjustment of the clock signal and outputting multiple clock phase vectors corresponding to the adjusted clock signal to the phase rotators on each receiver component. The phase rotators control sampling of the data based on the clock phase vectors received from the DLL. A single regulated power supply regulator regulates power supplied to the DLL and the phase rotators.

摘要翻译： 高速接收机包括多个接收机组件。 每个接收器组件包括用于接收数据的采样锁存器，用于控制由采样锁存器采样数据的定时的相位旋转器以及用于提供时钟和数据恢复的时钟跟踪逻辑级。 时钟跟踪逻辑级分为高速早/晚（E / L）逻辑和聚合计数器部分以及由同步逻辑块分隔的低速逻辑部分。 接收机还包括用于接收对应于接收数据的数据速率的输入时钟信号的延迟锁定环路（DLL），提供时钟信号的粗略的延迟调整，并将对应于经调整的时钟信号的多个时钟相位矢量输出到相位 每个接收器组件上的旋转器。 相位旋转器基于从DLL接收的时钟相位矢量来控制数据的采样。 单个稳压电源调节器调节提供给DLL和相位旋转器的电源。

公开(公告)号：US07492301B1

公开(公告)日：2009-02-17

申请号：US12181506

申请日：2008-07-29

申请人： Christoph Hagleitner ,  Christian I. Menolfi ,  Thomas H. Toifl

发明人： Christoph Hagleitner ,  Christian I. Menolfi ,  Thomas H. Toifl

IPC分类号： H03M1/12

CPC分类号： H03M1/361

摘要： According to one embodiment of the present invention an analog to digital converter comprises a track and hold unit, a plurality of current-integrating voltage shifters connected to the track and hold unit, a plurality of latches connected to the plurality of current-integrating voltage shifters, wherein a voltage offset of each latch in the plurality of latches is adjustable, wherein each current-integrating voltage shifter in the plurality of current-integrating voltage shifters drives a latch of the plurality of latches, wherein each current-integrating voltage shifter in the plurality of current-integrating voltage shifters corresponds to a voltage range, and wherein each latch connected to a current-integrating voltage shifter corresponds to a portion of the voltage range of the current-integrating voltage shifter.

摘要翻译： 根据本发明的一个实施例，模数转换器包括跟踪和保持单元，连接到跟踪和保持单元的多个电流积分电压移位器，多个锁存器，连接到多个电流积分变换器 其中，所述多个锁存器中的每个锁存器的电压偏移是可调的，其中所述多个电流积分电压移位器中的每个电流积分电压移位器驱动所述多个锁存器的锁存器，其中，所述多个锁存器中的每个电流积分电压移位器 多个电流积分电压移位器对应于电压范围，并且其中连接到电流积分电压移位器的每个锁存器对应于电流积分电压转换器的电压范围的一部分。

公开(公告)号：US06668627B2

公开(公告)日：2003-12-30

申请号：US09968946

申请日：2001-10-01

申请人： Dirk Lange ,  Christoph Hagleitner ,  Oliver Brand

发明人： Dirk Lange ,  Christoph Hagleitner ,  Oliver Brand

IPC分类号： G01B528

CPC分类号： G01Q10/045 ,  G01G7/02 ,  G01Q20/04 ,  Y10S977/865 ,  Y10S977/873

摘要： A magnetically excited, resonant cantilever sensor apparatus has a cantilever as the transducer element. A static magnetic field is directed in the plane of the cantilever(s) cooperating with a current loop in/on the latter. Orienting the magnetic field along or perpendicular to the cantilever axis and controlling the current apprpriately allows for selective excitation of resonance or non-resonance modes and/or in a self-oscillation mode. The deflection of the cantilever is detected using piezoresistive or magnetic readout. The apparatus may be used as gas sensor, scanning force microscope, mechanical filter, temperature sensor or the like.

摘要翻译： 磁激励谐振悬臂传感器装置具有悬臂作为换能器元件。 静态磁场被引导到悬臂的平面中，与其中的/在后者上的电流环配合。 沿着或垂直于悬臂轴定向磁场并且适当地控制电流允许谐振或非共振模式的选择性激励和/或以自振荡模式。 使用压阻或磁读出来检测悬臂的偏转。 该装置可以用作气体传感器，扫描力显微镜，机械过滤器，温度传感器等。