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41.发明授权Non-replacement gate nanomesh field effect transistor with epitixially grown source and drain 有权具有上限生长的源极和漏极的非替代栅极纳米场效应晶体管公开(公告)号：US08796742B1
公开(公告)日：2014-08-05
申请号：US14022735
申请日：2013-09-10
Applicant: International Business Machines Corporation
Inventor： Josephine B. Chang , Paul Chang , Isaac Lauer , Jeffrey W. Sleight
IPC: H01L29/745 , H01L29/74 , H01L21/336
CPC classification number: H01L29/0673 , B82Y10/00 , B82Y40/00 , H01L29/16 , H01L29/42392 , H01L29/66439 , H01L29/775 , H01L29/78696
Abstract: An alternating stack of two different semiconductor materials is patterned to include two pad regions and nanowire regions. A semiconductor material is laterally etched selective to another semiconductor material to form a nanomesh including suspended semiconductor nanowires. Gate dielectrics, a gate electrode, and a gate cap dielectric are formed over the nanomesh. A dielectric spacer is formed around the gate electrode. The semiconductor materials in the two pad regions and physically exposed portions of the nanomesh are removed employing the dielectric spacer and the gate cap dielectric as an etch mask. A source region and a drain region are epitaxially grown from end surfaces of the nanomesh.
Abstract translation: 将两个不同的半导体材料的交替堆叠图案化以包括两个焊盘区域和纳米线区域。 对另一半导体材料的半导体材料进行横向蚀刻选择性以形成包括悬浮半导体纳米线的纳米片。 在纳米级上形成栅极电介质，栅电极和栅极帽电介质。 在栅电极周围形成介电隔离件。 使用电介质间隔物和栅极盖电介质作为蚀刻掩模去除两个焊盘区域中的半导体材料和纳米薄膜的物理暴露部分。 源极区域和漏极区域从纳米单体的端面外延生长。
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公开(公告)号：US08785981B1
公开(公告)日：2014-07-22
申请号：US14022469
申请日：2013-09-10
Applicant: International Business Machines Corporation
Inventor： Josephine B. Chang , Paul Chang , Isaac Lauer , Jeffrey W. Sleight
IPC: H01L29/745 , H01L21/336
CPC classification number: H01L29/775 , B82Y10/00 , H01L29/0673 , H01L29/42392 , H01L29/66439 , H01L29/66469 , H01L29/78696
Abstract: A gate-first processing scheme for forming a nanomesh field effect transistor is provided. An alternating stack of two different semiconductor materials is patterned to include two pad regions and nanowire regions. A semiconductor material is laterally etched selective to another semiconductor material to form a nanomesh including suspended semiconductor nanowires. A stack of a gate dielectric, a gate electrode, and a gate cap dielectric is formed over the nanomesh. A dielectric spacer is formed around the gate electrode. An isotropic etch is employed to remove dielectric materials that are formed in lateral recesses of the patterned alternating stack. A selective epitaxy process can be employed to form a source region and a drain region.
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公开(公告)号：US12166106B2
公开(公告)日：2024-12-10
申请号：US17542566
申请日：2021-12-06
Applicant: International Business Machines Corporation
Inventor： Jeffrey W. Sleight , Josephine Chang , Isaac Lauer
IPC: H01L29/66 , B82Y10/00 , H01L21/768 , H01L29/06 , H01L29/786 , H10K10/46 , H10K85/20
Abstract: A field effect transistor (FET) includes a substrate; a channel material located on the substrate, the channel material comprising one of graphene or a nanostructure; a gate located on a first portion of the channel material; and a contact aligned to the gate, the contact comprising one of a metal silicide, a metal carbide, and a metal, the contact being located over a source region and a drain region of the FET, the source region and the drain region comprising a second portion of the channel material.
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公开(公告)号：US12041856B2
公开(公告)日：2024-07-16
申请号：US17037191
申请日：2020-09-29
Applicant: International Business Machines Corporation
Inventor： Isaac Lauer , Karthik Balakrishnan , Jeffrey Sleight , David James Frank
Abstract: Devices, systems, methods, and/or computer-implemented methods that can facilitate a qubit device comprising a superconducting circuit provided on an encapsulated vacuum cavity are provided. According to an embodiment, a device can comprise a substrate having an encapsulated vacuum cavity provided on the substrate. The device can further comprise a superconducting circuit provided on the encapsulated vacuum cavity.
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公开(公告)号：US20230418706A1
公开(公告)日：2023-12-28
申请号：US18461589
申请日：2023-09-06
Applicant: International Business Machines Corporation
Inventor： Isaac Lauer , Neereja Sundaresan , Emily Pritchett
CPC classification number: G06F11/1048 , G06N10/00 , G06N10/70
Abstract: Techniques for using stark tone pulses to mitigate cross-resonance collision in qubits are presented. A tone management component can control application of pulses to qubits by a tone generator component to mitigate undesirable frequency collisions between qubits. The tone generator component (TGC) can apply an off-resonant tone pulse to a qubit during a gate to induce a stark shift. TGC can apply a cross-resonance tone pulse to a control qubit at a frequency associated with the qubit, wherein the frequency can be stark shifted based on the off-resonant tone pulse. The qubit can be a target qubit, the control qubit itself, or a spectator qubit that can be coupled to the target qubit or the control qubit. The gate can be a cross-resonance gate, a two-qubit gate, or a measurement gate that can utilize an echo sequence, a target rotary, or active cancellation.
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Patent Agency Ranking
公开(公告)号：US11789812B2
公开(公告)日：2023-10-17
申请号：US17526837
申请日：2021-11-15
Applicant: International Business Machines Corporation
Inventor： Isaac Lauer , Neereja Sundaresan , Emily Pritchett
CPC classification number: G06F11/1048 , G06N10/00 , G06N10/70
Abstract: Techniques for using stark tone pulses to mitigate cross-resonance collision in qubits are presented. A tone management component can control application of pulses to qubits by a tone generator component to mitigate undesirable frequency collisions between qubits. The tone generator component (TGC) can apply an off-resonant tone pulse to a qubit during a gate to induce a stark shift. TGC can apply a cross-resonance tone pulse to a control qubit at a frequency associated with the qubit, wherein the frequency can be stark shifted based on the off-resonant tone pulse. The qubit can be a target qubit, the control qubit itself, or a spectator qubit that can be coupled to the target qubit or the control qubit. The gate can be a cross-resonance gate, a two-qubit gate, or a measurement gate that can utilize an echo sequence, a target rotary, or active cancellation.
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公开(公告)号：US11751491B2
公开(公告)日：2023-09-05
申请号：US16935698
申请日：2020-07-22
Applicant: International Business Machines Corporation
Inventor： Isaac Lauer , Neereja Sundaresan
CPC classification number: H10N69/00 , G06N10/00 , H10N60/0912 , H10N60/12
Abstract: Systems and techniques that facilitate mapping a heavy-hex qubit connection topology to a rectilinear physical qubit layout are provided. In various embodiments, a device can comprise a qubit lattice on a substrate. In various aspects, the qubit lattice can comprise one or more first qubit tiles. In various cases, the one or more first qubit tiles can have a first shape. In various instances, the qubit lattice can further comprise one or more second qubit tiles. In various cases, the one or more second qubit tiles can have a second shape. In various aspects, the one or more first qubit tiles can be tessellated with the one or more second qubit tiles.
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公开(公告)号：US20230153199A1
公开(公告)日：2023-05-18
申请号：US17526837
申请日：2021-11-15
Applicant: International Business Machines Corporation
Inventor： Isaac Lauer , Neereja Sundaresan , Emily Pritchett
CPC classification number: G06F11/1048 , G06N10/00
Abstract: Techniques for using stark tone pulses to mitigate cross-resonance collision in qubits are presented. A tone management component can control application of pulses to qubits by a tone generator component to mitigate undesirable frequency collisions between qubits. The tone generator component (TGC) can apply an off-resonant tone pulse to a qubit during a gate to induce a stark shift. TGC can apply a cross-resonance tone pulse to a control qubit at a frequency associated with the qubit, wherein the frequency can be stark shifted based on the off-resonant tone pulse. The qubit can be a target qubit, the control qubit itself, or a spectator qubit that can be coupled to the target qubit or the control qubit. The gate can be a cross-resonance gate, a two-qubit gate, or a measurement gate that can utilize an echo sequence, a target rotary, or active cancellation.
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公开(公告)号：US20220416392A1
公开(公告)日：2022-12-29
申请号：US17930269
申请日：2022-09-07
Applicant: International Business Machines Corporation
Inventor： Isaac Lauer , William Francis Landers , Srikanth Srinivasan , Neereja Sundaresan
Abstract: Techniques regarding an embedded microstrip transmission line implemented in one more superconducting microwave electronic devices are provided. For example, one or more embodiments described herein can comprise an apparatus, which can include a superconducting material layer positioned on a raised portion of a dielectric substrate. The raised portion can extend from a surface of the dielectric substrate. The apparatus can also comprise a dielectric film that covers at least a portion of the superconducting material layer and the raised portion of the dielectric substrate.
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公开(公告)号：US11469485B2
公开(公告)日：2022-10-11
申请号：US17076107
申请日：2020-10-21
Applicant: International Business Machines Corporation
Inventor： Isaac Lauer , William Francis Landers , Srikanth Srinivasan , Neereja Sundaresan
Abstract: Techniques regarding an embedded microstrip transmission line implemented in one more superconducting microwave electronic devices are provided. For example, one or more embodiments described herein can comprise an apparatus, which can include a superconducting material layer positioned on a raised portion of a dielectric substrate. The raised portion can extend from a surface of the dielectric substrate. The apparatus can also comprise a dielectric film that covers at least a portion of the superconducting material layer and the raised portion of the dielectric substrate.
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