Serializer/deserializer apparatus with loopback configuration and methods thereof
    43.
    发明授权
    Serializer/deserializer apparatus with loopback configuration and methods thereof 有权
    具有环回配置的串行器/解串器设备及其方法

    公开(公告)号:US08855176B1

    公开(公告)日:2014-10-07

    申请号:US14256792

    申请日:2014-04-18

    CPC classification number: H04L25/063 H03M9/00 H04B1/38 H04B3/04 H04B3/14

    Abstract: The present invention is directed to integrated circuits. In a specific embodiment, high frequency signals from an equalizer are directly connected to a first pair of inputs of a sense amplifier. The sense amplifier also has a second pair of inputs, which can be selectively coupled to output signals from a DAC or high frequency loopback signals. There are other embodiments as well.

    Abstract translation: 本发明涉及集成电路。 在具体实施例中,来自均衡器的高频信号直接连接到读出放大器的第一对输入端。 读出放大器还具有第二对输入,其可以选择性地耦合到来自DAC或高频环回信号的输出信号。 还有其它实施例。

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