Method for fabricating a semiconductor device having different gate oxide layers
    41.
    发明授权
    Method for fabricating a semiconductor device having different gate oxide layers 有权
    制造具有不同栅氧化层的半导体器件的方法

    公开(公告)号:US06329249B1

    公开(公告)日:2001-12-11

    申请号:US09333574

    申请日:1999-06-15

    IPC分类号: H01L218234

    摘要: A method for fabricating a semiconductor device with different gate oxide layers. Oxidation is controlled in accordance with the active area dimension so that oxide grows thin at a wider active width (peripheral region) and grows thickly at a narrower active width (cell array region). A gate pattern is formed on a semiconductor substrate having different active areas. Gate spacers are formed and then active dimension dependent oxidation process is performed to grow the oxide layers differently from one another.

    摘要翻译: 一种制造具有不同栅氧化层的半导体器件的方法。 根据有源面积尺寸控制氧化,使得氧化物在较宽的有源宽度(周边区域)上生长较薄,并且以较窄的有效宽度(电池阵列区域)厚厚地生长。 在具有不同有源区的半导体衬底上形成栅极图案。 形成栅极隔离物,然后进行活性尺寸依赖氧化工艺以使氧化物层彼此不同地生长。

    Drive motor for an electric vehicle
    42.
    发明授权
    Drive motor for an electric vehicle 失效
    驱动电动汽车电机

    公开(公告)号:US5939806A

    公开(公告)日:1999-08-17

    申请号:US993039

    申请日:1997-12-18

    IPC分类号: H02K5/20 H02K9/16

    CPC分类号: H02K5/20 Y02T10/641

    摘要: A drive motor for an electric vehicle includes a cylindrical housing, a cylindrical stator disposed within the housing, a coil wound around the stator, a rotor disposed within the stator, and front and rear covers respectively coupled on front and rear ends of the housing. The housing includes a cylindrical coolant passage concentrically formed around the stator in the housing, and the front or rear cover includes a coolant inlet port through which coolant is fed to the coolant passage and a coolant outlet port through which coolant circulated the coolant passage is exhausted.

    摘要翻译: 一种用于电动车辆的驱动电动机包括圆柱形壳体,设置在壳体内的圆柱形定子,缠绕在定子上的线圈,设置在定子内的转子以及分别联接在壳体的前端和后端上的前后盖。 壳体包括围绕壳体中的定子同心地形成的圆柱形冷却剂通道,并且前盖或后盖包括冷却剂入口,冷却剂通过所述冷却剂入口供给到冷却剂通道和冷却剂循环冷却剂通道的冷却剂出口 。

    Flash memory devices that utilize age-based verify voltages to increase data reliability and methods of operating same
    43.
    发明授权
    Flash memory devices that utilize age-based verify voltages to increase data reliability and methods of operating same 有权
    使用基于年龄的验证电压来提高数据可靠性的闪存器件和操作方法

    公开(公告)号:US07986560B2

    公开(公告)日:2011-07-26

    申请号:US12558717

    申请日:2009-09-14

    IPC分类号: G11C11/34

    CPC分类号: G11C16/344 G11C16/3454

    摘要: Disclosed is a method of verifying a programmed condition of a flash memory device, being comprised of: determining a level of an additional verifying voltage in response to the number of programming/erasing cycles of memory cells; conducting a verifying operation to programmed memory cells with an initial verifying voltage lower than the additional verifying voltage; and selectively conducting an additional verifying operation with the additional verifying voltage to the program-verified memory cells in response to the number of programming/erasing cycles.

    摘要翻译: 公开了一种验证闪速存储器件的编程状态的方法,其包括:响应于存储器单元的编程/擦除循环的数量确定额外的验证电压的电平; 对初始验证电压低于附加验证电压的程序存储单元执行验证操作; 以及响应于所述编程/擦除周期的数量,选择性地对所述经过程序验证的存储器单元执行附加验证电压的附加验证操作。

    Non-volatile memory device and non-volatile semiconductor integrated circuit device, including the same
    44.
    发明授权
    Non-volatile memory device and non-volatile semiconductor integrated circuit device, including the same 有权
    非易失性存储器件和非易失性半导体集成电路器件,包括相同的

    公开(公告)号:US07829929B2

    公开(公告)日:2010-11-09

    申请号:US12070422

    申请日:2008-02-19

    IPC分类号: H01L29/76

    摘要: A non-volatile memory device has improved operating characteristics. The non-volatile memory device includes an active region; a wordline formed on the active region to cross the active region; and a charge trapping layer interposed between the active region and the wordline, wherein a cross region of the active region and the wordline includes an overlap region in which the charge trapping layer is disposed and a non-overlap region in which the charge trapping layer is not disposed.

    摘要翻译: 非易失性存储器件具有改进的操作特性。 非易失性存储器件包括有源区; 在有源区域上形成的跨越有源区域的字线; 以及插入在有源区域和字线之间的电荷俘获层,其中有源区域和字线的交叉区域包括其中设置电荷捕获层的重叠区域和电荷捕获层是非重叠区域 没有处理

    Method of programming in a non-volatile memory device and non-volatile memory device for performing the same
    45.
    发明授权
    Method of programming in a non-volatile memory device and non-volatile memory device for performing the same 有权
    在非易失性存储器件和用于执行该非易失性存储器件的非易失性存储器件中进行编程的方法

    公开(公告)号:US07672166B2

    公开(公告)日:2010-03-02

    申请号:US11955891

    申请日:2007-12-13

    IPC分类号: G11C16/06

    摘要: Provided are methods for programming in a non-volatile memory device, using incremental step pulses as a program voltage that is applied to a selected wordline. Methods may include applying a precharge voltage to an even bitline and an odd bitline such that the even bitline and the odd bitline are alternately charged with the precharge voltage and a boosted voltage that is higher than the precharge voltage. Methods may further include applying a bitline voltage corresponding to program data to a selected bitline of the even bitline and the odd bitline.

    摘要翻译: 提供了用于在非易失性存储器件中进行编程的方法,其使用增量步长脉冲作为施加到选定字线的编程电压。 方法可以包括将预充电电压施加到偶数位线和奇数位线,使得偶数位线和奇数位线以预充电电压和高于预充电电压的升压电压交替地充电。 方法还可以包括将对应于程序数据的位线电压应用于偶位线和奇数位线的选定位线。

    Non-volatile memory device, method of fabricating the same, and non-volatile semiconductor integrated circuit device, including the same
    46.
    发明申请
    Non-volatile memory device, method of fabricating the same, and non-volatile semiconductor integrated circuit device, including the same 有权
    非易失性存储器件及其制造方法以及包括该非易失性存储器件的非易失性半导体集成电路器件

    公开(公告)号:US20090206387A1

    公开(公告)日:2009-08-20

    申请号:US12070422

    申请日:2008-02-19

    摘要: A non-volatile memory device has improved operating characteristics. The non-volatile memory device includes an active region; a wordline formed on the active region to cross the active region; and a charge trapping layer interposed between the active region and the wordline, wherein a cross region of the active region and the wordline includes an overlap region in which the charge trapping layer is disposed and a non-overlap region in which the charge trapping layer is not disposed.

    摘要翻译: 非易失性存储器件具有改进的操作特性。 非易失性存储器件包括有源区; 在有源区域上形成的跨越有源区域的字线; 以及插入在有源区域和字线之间的电荷俘获层,其中有源区域和字线的交叉区域包括其中设置电荷捕获层的重叠区域和电荷捕获层是非重叠区域 没有处理

    Ferroelectric memory devices having expanded plate lines
    47.
    发明授权
    Ferroelectric memory devices having expanded plate lines 失效
    具有扩展板线的铁电存储器件

    公开(公告)号:US07560760B2

    公开(公告)日:2009-07-14

    申请号:US11859958

    申请日:2007-09-24

    IPC分类号: H01L27/115

    摘要: A ferroelectric memory device includes a microelectronic substrate and a plurality of ferroelectric capacitors on the substrate, arranged as a plurality of row and columns in respective row and column directions. A plurality of parallel plate lines overlie the ferroelectric capacitors and extend along the row direction, wherein a plate line contacts ferroelectric capacitors in at least two adjacent rows. The plurality of plate lines may include a plurality of local plate lines, and the ferroelectric memory device may further include an insulating layer disposed on the local plate lines and a plurality of main plate lines disposed on the insulating layer and contacting the local plate lines through openings in the insulating layer. In some embodiments, ferroelectric capacitors in adjacent rows share a common upper electrode, and respective ones of the local plate lines are disposed on respective ones of the common upper electrodes. Ferroelectric capacitors in adjacent rows may share a common ferroelectric dielectric region. Related fabrication methods are discussed.

    摘要翻译: 铁电存储器件包括微电子衬底和在衬底上的多个铁电电容器,被布置为在行和列方向上的多个行和列。 多个平行板线覆盖在铁电电容器上并沿着行方向延伸,其中板线在至少两个相邻行中接触铁电电容器。 多个板线可以包括多个局部板线,并且铁电存储器件还可以包括设置在局部板线上的绝缘层和设置在绝缘层上的多个主板线,并且使本地板线通过 绝缘层中的开口。 在一些实施例中,相邻行中的铁电电容器共享公共上电极,并且各自的局部板线设置在相应的公共上电极上。 相邻行中的铁电电容器可以共享公共铁电电介质区域。 讨论相关的制造方法。

    Node structures under capacitor in ferroelectric random access memory device and methods of forming the same
    48.
    发明申请
    Node structures under capacitor in ferroelectric random access memory device and methods of forming the same 审中-公开
    铁电随机存取存储器件中电容器下的节点结构及其形成方法

    公开(公告)号:US20080111171A1

    公开(公告)日:2008-05-15

    申请号:US11811931

    申请日:2007-06-12

    IPC分类号: H01L29/94 H01L21/02

    摘要: In a node structure under a capacitor in a ferroelectric random access memory device and a method of forming the same, top surfaces of the node structures are disposed at substantially the same level as a top surface of an interlayer insulating layer surrounding the node structures, and thus crystal growth of a ferroelectric in the capacitor can be stabilized. To this end, a node insulating pattern is formed on a semiconductor substrate. A node defining pattern surrounding the node insulating pattern is disposed under the node insulating pattern. A node conductive pattern is disposed between the node defining pattern and the node insulating pattern.

    摘要翻译: 在铁电随机存取存储器件中的电容器下的节点结构及其形成方法中,节点结构的顶表面设置在与节点结构周围的层间绝缘层的顶表面基本相同的水平处,并且 因此可以使电容器中的铁电体的晶体生长稳定。 为此,在半导体衬底上形成节点绝缘图案。 定义节点绝缘图案周围的节点的节点设置在节点绝缘图案之下。 节点导电图案设置在节点限定图案和节点绝缘图案之间。

    FERROELECTRIC MEMORY DEVICES HAVING EXPANDED PLATE LINES
    49.
    发明申请
    FERROELECTRIC MEMORY DEVICES HAVING EXPANDED PLATE LINES 失效
    具有扩展板线的电磁存储器件

    公开(公告)号:US20080025065A1

    公开(公告)日:2008-01-31

    申请号:US11859958

    申请日:2007-09-24

    IPC分类号: G11C11/22

    摘要: A ferroelectric memory device includes a microelectronic substrate and a plurality of ferroelectric capacitors on the substrate, arranged as a plurality of row and columns in respective row and column directions. A plurality of parallel plate lines overlie the ferroelectric capacitors and extend along the row direction, wherein a plate line contacts ferroelectric capacitors in at least two adjacent rows. The plurality of plate lines may include a plurality of local plate lines, and the ferroelectric memory device may further include an insulating layer disposed on the local plate lines and a plurality of main plate lines disposed on the insulating layer and contacting the local plate lines through openings in the insulating layer. In some embodiments, ferroelectric capacitors in adjacent rows share a common upper electrode, and respective ones of the local plate lines are disposed on respective ones of the common upper electrodes. Ferroelectric capacitors in adjacent rows may share a common ferroelectric dielectric region. Related fabrication methods are discussed.

    摘要翻译: 铁电存储器件包括微电子衬底和在衬底上的多个铁电电容器,被布置为在行和列方向上的多个行和列。 多个平行板线覆盖在铁电电容器上并沿着行方向延伸,其中板线在至少两个相邻行中接触铁电电容器。 多个板线可以包括多个局部板线,并且铁电存储器件还可以包括设置在局部板线上的绝缘层和设置在绝缘层上的多个主板线,并且使本地板线通过 绝缘层中的开口。 在一些实施例中,相邻行中的铁电电容器共享公共上电极,并且各自的局部板线设置在相应的公共上电极上。 相邻行中的铁电电容器可以共享公共铁电电介质区域。 讨论相关的制造方法。

    Method for operating non-volatile memory device
    50.
    发明申请
    Method for operating non-volatile memory device 审中-公开
    操作非易失性存储器件的方法

    公开(公告)号:US20070268749A1

    公开(公告)日:2007-11-22

    申请号:US11802282

    申请日:2007-05-22

    IPC分类号: G11C11/34 G11C16/04

    摘要: A method of operating a non-volatile memory device is disclosed. The memory cell includes a channel region separating a source region and a drain region, a tunnel insulating layer, a charge storage layer, and a gate electrode formed over the channel region. The method includes applying a negative voltage to the gate electrode and applying a positive voltage to at least one of the source and drain regions to inject holes into the tunnel insulating layer and thereby remove electrons trapped in the tunnel insulating layer.

    摘要翻译: 公开了一种操作非易失性存储器件的方法。 存储单元包括分离源极区和漏极区的沟道区,隧道绝缘层,电荷存储层和形成在沟道区上的栅电极。 该方法包括向栅电极施加负电压并向源区和漏区中的至少一个施加正电压,以将空穴注入到隧道绝缘层中,从而去除俘获在隧道绝缘层中的电子。