公开(公告)号：US20050035384A1

公开(公告)日：2005-02-17

申请号：US10948610

申请日：2004-09-23

申请人： Hyun-Ho Kim ,  Dong-Jin Jung ,  Ki-Nam Kim ,  Sang-Don Nam ,  Kyu-Mann Lee

发明人： Hyun-Ho Kim ,  Dong-Jin Jung ,  Ki-Nam Kim ,  Sang-Don Nam ,  Kyu-Mann Lee

IPC分类号： H01L27/105 ,  G11C11/22 ,  H01L21/8246 ,  H01L27/115 ,  H01L29/76

CPC分类号： H01L27/11502 ,  G11C11/22 ,  H01L27/11507

摘要： A ferroelectric memory device includes a microelectronic substrate and a plurality of ferroelectric capacitors on the substrate, arranged as a plurality of rows and columns in respective row and column directions. A plurality of parallel plate lines overlie the ferroelectric capacitors and extend along the row direction, wherein a plate line contacts ferroelectric capacitors in at least two adjacent rows. The plurality of plate lines may include a plurality of local plate lines, and the ferroelectric memory device may further include an insulating layer disposed on the local plate lines and a plurality of main plate lines disposed on the insulating layer and contacting the local plate lines through openings in the insulating layer. In some embodiments, ferroelectric capacitors in adjacent rows share a common upper electrode, and respective ones of the local plate lines are disposed on respective ones of the common upper electrodes. Ferroelectric capacitors in adjacent rows may share a common ferroelectric dielectric region. Related fabrication methods are discussed.

公开(公告)号：US06844583B2

公开(公告)日：2005-01-18

申请号：US10136991

申请日：2002-05-02

申请人： Hyun-Ho Kim ,  Dong-Jin Jung ,  Ki-Nam Kim ,  Sang-Don Nam ,  Kyu-Mann Lee

发明人： Hyun-Ho Kim ,  Dong-Jin Jung ,  Ki-Nam Kim ,  Sang-Don Nam ,  Kyu-Mann Lee

IPC分类号： H01L27/105 ,  G11C11/22 ,  H01L21/8246 ,  H01L27/115 ,  H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119

CPC分类号： H01L27/11502 ,  G11C11/22 ,  H01L27/11507

摘要： A ferroelectric memory device includes a microelectronic substrate and a plurality of ferroelectric capacitors on the substrate, arranged as a plurality of rows and columns in respective row and column directions. A plurality of parallel plate lines overlie the ferroelectric capacitors and extend along the row direction, wherein a plate line contacts ferroelectric capacitors in at least two adjacent rows. The plurality of plate lines may include a plurality of local plate lines, and the ferroelectric memory device may further include an insulating layer disposed on the local plate lines and a plurality of main plate lines disposed on the insulating layer and contacting the local plate lines through openings in the insulating layer. In some embodiments, ferroelectric capacitors in adjacent rows share a common upper electrode, and respective ones of the local plate lines are disposed on respective ones of the common upper electrodes. Ferroelectric capacitors in adjacent rows may share a common ferroelectric dielectric region. Related fabrication methods are discussed.

摘要翻译： 铁电存储器件包括微电子衬底和在衬底上的多个铁电电容器，其被布置为在行和列方向上的多个行和列。 多个平行板线覆盖在铁电电容器上并沿着行方向延伸，其中板线在至少两个相邻行中接触铁电电容器。 多个板线可以包括多个局部板线，并且铁电存储器件还可以包括设置在局部板线上的绝缘层和设置在绝缘层上的多个主板线，并且使本地板线通过 绝缘层中的开口。 在一些实施例中，相邻行中的铁电电容器共享公共上电极，并且各自的局部板线设置在相应的公共上电极上。 相邻行中的铁电电容器可以共享公共铁电电介质区域。 讨论相关的制造方法。

公开(公告)号：US07285810B2

公开(公告)日：2007-10-23

申请号：US10948610

申请日：2004-09-23

申请人： Hyun-Ho Kim ,  Dong-Jin Jung ,  Ki-Nam Kim ,  Sang-Don Nam ,  Kyu-Mann Lee

发明人： Hyun-Ho Kim ,  Dong-Jin Jung ,  Ki-Nam Kim ,  Sang-Don Nam ,  Kyu-Mann Lee

IPC分类号： H01L31/0224

CPC分类号： H01L27/11502 ,  G11C11/22 ,  H01L27/11507

摘要： A ferroelectric memory device includes a microelectronic substrate and a plurality of ferroelectric capacitors on the substrate, arranged as a plurality of rows and columns in respective row and column directions. A plurality of parallel plate lines overlie the ferroelectric capacitors and extend along the row direction, wherein a plate line contacts ferroelectric capacitors in at least two adjacent rows. The plurality of plate lines may include a plurality of local plate lines, and the ferroelectric memory device may further include an insulating layer disposed on the local plate lines and a plurality of main plate lines disposed on the insulating layer and contacting the local plate lines through openings in the insulating layer. In some embodiments, ferroelectric capacitors in adjacent rows share a common upper electrode, and respective ones of the local plate lines are disposed on respective ones of the common upper electrodes. Ferroelectric capacitors in adjacent rows may share a common ferroelectric dielectric region. Related fabrication methods are discussed.

摘要翻译： 铁电存储器件包括微电子衬底和在衬底上的多个铁电电容器，其被布置为在行和列方向上的多个行和列。 多个平行板线覆盖在铁电电容器上并沿着行方向延伸，其中板线在至少两个相邻行中接触铁电电容器。 多个板线可以包括多个局部板线，并且铁电存储器件还可以包括设置在局部板线上的绝缘层和设置在绝缘层上的多个主板线，并且使本地板线通过 绝缘层中的开口。 在一些实施例中，相邻行中的铁电电容器共享公共上电极，并且各自的局部板线设置在相应的公共上电极上。 相邻行中的铁电电容器可以共享公共铁电电介质区域。 讨论相关的制造方法。

公开(公告)号：US07208367B2

公开(公告)日：2007-04-24

申请号：US11029232

申请日：2005-01-04

申请人： Hyun-Ho Kim ,  Dong-Jin Jung ,  Ki-Nam Kim ,  Sang-Don Nam ,  Kyu-Mann Lee

发明人： Hyun-Ho Kim ,  Dong-Jin Jung ,  Ki-Nam Kim ,  Sang-Don Nam ,  Kyu-Mann Lee

IPC分类号： H01L21/8242

CPC分类号： H01L27/11502 ,  G11C11/22 ,  H01L27/11507

摘要： A ferroelectric memory device includes a microelectronic substrate and a plurality of ferroelectric capacitors on the substrate, arranged as a plurality of rows and columns in respective row and column directions. A plurality of parallel plate lines overlie the ferroelectric capacitors and extend along the row direction, wherein a plate line contacts ferroelectric capacitors in at least two adjacent rows. The plurality of plate lines may include a plurality of local plate lines, and the ferroelectric memory device may further include an insulating layer disposed on the local plate lines and a plurality of main plate lines disposed on the insulating layer and contacting the local plate lines through openings in the insulating layer. In some embodiments, ferroelectric capacitors in adjacent rows share a common upper electrode, and respective ones of the local plate lines are disposed on respective ones of the common upper electrodes. Ferroelectric capacitors in adjacent rows may share a common ferroelectric dielectric region. Related fabrication methods are discussed.

摘要翻译： 铁电存储器件包括微电子衬底和在衬底上的多个铁电电容器，其被布置为在行和列方向上的多个行和列。 多个平行板线覆盖在铁电电容器上并沿着行方向延伸，其中板线在至少两个相邻行中接触铁电电容器。 多个板线可以包括多个局部板线，并且铁电存储器件还可以包括设置在局部板线上的绝缘层和设置在绝缘层上的多个主板线，并且使本地板线通过 绝缘层中的开口。 在一些实施例中，相邻行中的铁电电容器共享公共上电极，并且各自的局部板线设置在相应的公共上电极上。 相邻行中的铁电电容器可以共享公共铁电电介质区域。 讨论相关的制造方法。

公开(公告)号：US07560760B2

公开(公告)日：2009-07-14

申请号：US11859958

申请日：2007-09-24

申请人： Hyun-Ho Kim ,  Dong-Jin Jung ,  Ki-Nam Kim ,  Sang-Don Nam ,  Kyu-Mann Lee

发明人： Hyun-Ho Kim ,  Dong-Jin Jung ,  Ki-Nam Kim ,  Sang-Don Nam ,  Kyu-Mann Lee

IPC分类号： H01L27/115

CPC分类号： H01L27/11502 ,  G11C11/22 ,  H01L27/11507

摘要： A ferroelectric memory device includes a microelectronic substrate and a plurality of ferroelectric capacitors on the substrate, arranged as a plurality of row and columns in respective row and column directions. A plurality of parallel plate lines overlie the ferroelectric capacitors and extend along the row direction, wherein a plate line contacts ferroelectric capacitors in at least two adjacent rows. The plurality of plate lines may include a plurality of local plate lines, and the ferroelectric memory device may further include an insulating layer disposed on the local plate lines and a plurality of main plate lines disposed on the insulating layer and contacting the local plate lines through openings in the insulating layer. In some embodiments, ferroelectric capacitors in adjacent rows share a common upper electrode, and respective ones of the local plate lines are disposed on respective ones of the common upper electrodes. Ferroelectric capacitors in adjacent rows may share a common ferroelectric dielectric region. Related fabrication methods are discussed.

摘要翻译： 铁电存储器件包括微电子衬底和在衬底上的多个铁电电容器，被布置为在行和列方向上的多个行和列。 多个平行板线覆盖在铁电电容器上并沿着行方向延伸，其中板线在至少两个相邻行中接触铁电电容器。 多个板线可以包括多个局部板线，并且铁电存储器件还可以包括设置在局部板线上的绝缘层和设置在绝缘层上的多个主板线，并且使本地板线通过 绝缘层中的开口。 在一些实施例中，相邻行中的铁电电容器共享公共上电极，并且各自的局部板线设置在相应的公共上电极上。 相邻行中的铁电电容器可以共享公共铁电电介质区域。 讨论相关的制造方法。

公开(公告)号：US20080025065A1

公开(公告)日：2008-01-31

申请号：US11859958

申请日：2007-09-24

申请人： Hyun-Ho Kim ,  Dong-Jin Jung ,  Ki-Nam Kim ,  Sang-Don Nam ,  Kyu-Mann Lee

发明人： Hyun-Ho Kim ,  Dong-Jin Jung ,  Ki-Nam Kim ,  Sang-Don Nam ,  Kyu-Mann Lee

IPC分类号： G11C11/22

CPC分类号： H01L27/11502 ,  G11C11/22 ,  H01L27/11507

摘要： A ferroelectric memory device includes a microelectronic substrate and a plurality of ferroelectric capacitors on the substrate, arranged as a plurality of row and columns in respective row and column directions. A plurality of parallel plate lines overlie the ferroelectric capacitors and extend along the row direction, wherein a plate line contacts ferroelectric capacitors in at least two adjacent rows. The plurality of plate lines may include a plurality of local plate lines, and the ferroelectric memory device may further include an insulating layer disposed on the local plate lines and a plurality of main plate lines disposed on the insulating layer and contacting the local plate lines through openings in the insulating layer. In some embodiments, ferroelectric capacitors in adjacent rows share a common upper electrode, and respective ones of the local plate lines are disposed on respective ones of the common upper electrodes. Ferroelectric capacitors in adjacent rows may share a common ferroelectric dielectric region. Related fabrication methods are discussed.

摘要翻译： 铁电存储器件包括微电子衬底和在衬底上的多个铁电电容器，被布置为在行和列方向上的多个行和列。 多个平行板线覆盖在铁电电容器上并沿着行方向延伸，其中板线在至少两个相邻行中接触铁电电容器。 多个板线可以包括多个局部板线，并且铁电存储器件还可以包括设置在局部板线上的绝缘层和设置在绝缘层上的多个主板线，并且使本地板线通过 绝缘层中的开口。 在一些实施例中，相邻行中的铁电电容器共享公共上电极，并且各自的局部板线设置在相应的公共上电极上。 相邻行中的铁电电容器可以共享公共铁电电介质区域。 讨论相关的制造方法。

公开(公告)号：US20050117382A1

公开(公告)日：2005-06-02

申请号：US11029232

申请日：2005-01-04

申请人： Hyun-Ho Kim ,  Dong-Jin Jung ,  Ki-Nam Kim ,  Sang-Don Nam ,  Kyu-Mann Lee

发明人： Hyun-Ho Kim ,  Dong-Jin Jung ,  Ki-Nam Kim ,  Sang-Don Nam ,  Kyu-Mann Lee

IPC分类号： H01L27/105 ,  G11C11/22 ,  H01L21/8246 ,  H01L27/115

CPC分类号： H01L27/11502 ,  G11C11/22 ,  H01L27/11507

摘要： A ferroelectric memory device includes a microelectronic substrate and a plurality of ferroelectric capacitors on the substrate, arranged as a plurality of rows and columns in respective row and column directions. A plurality of parallel plate lines overlie the ferroelectric capacitors and extend along the row direction, wherein a plate line contacts ferroelectric capacitors in at least two adjacent rows. The plurality of plate lines may include a plurality of local plate lines, and the ferroelectric memory device may further include an insulating layer disposed on the local plate lines and a plurality of main plate lines disposed on the insulating layer and contacting the local plate lines through openings in the insulating layer. In some embodiments, ferroelectric capacitors in adjacent rows share a common upper electrode, and respective ones of the local plate lines are disposed on respective ones of the common upper electrodes. Ferroelectric capacitors in adjacent rows may share a common ferroelectric dielectric region. Related fabrication methods are discussed.

摘要翻译： 铁电存储器件包括微电子衬底和在衬底上的多个铁电电容器，其被布置为在行和列方向上的多个行和列。 多个平行板线覆盖在铁电电容器上并沿着行方向延伸，其中板线在至少两个相邻行中接触铁电电容器。 多个板线可以包括多个局部板线，并且铁电存储器件还可以包括设置在局部板线上的绝缘层和设置在绝缘层上的多个主板线，并且使本地板线通过 绝缘层中的开口。 在一些实施例中，相邻行中的铁电电容器共享公共上电极，并且各自的局部板线设置在相应的公共上电极上。 相邻行中的铁电电容器可以共享公共铁电电介质区域。 讨论相关的制造方法。

公开(公告)号：US06952028B2

公开(公告)日：2005-10-04

申请号：US10624327

申请日：2003-07-22

申请人： Kyu-Mann Lee ,  Sang-Don Nam ,  Kun-Sang Park

发明人： Kyu-Mann Lee ,  Sang-Don Nam ,  Kun-Sang Park

IPC分类号： H01L27/105 ,  H01L21/768 ,  H01L21/8246 ,  H01L27/115 ,  H01L29/76

CPC分类号： H01L21/76804 ,  H01L21/76841 ,  H01L21/76852 ,  H01L27/11502 ,  H01L27/11507

摘要： A ferroelectric memory device includes a lower interlayer dielectric on a semiconductor substrate, a plurality of ferroelectric capacitors, and a plate line. The ferroelectric capacitors are on the lower interlayer dielectric. The plate line extends across and electrically connects to surfaces of at least two adjacent ones of the plurality of ferroelectric capacitors.

摘要翻译： 铁电存储器件包括在半导体衬底上的下层间电介质，多个铁电电容器和板线。 铁电电容器位于下层电介质上。 板线延伸并且电连接到多个铁电电容器中的至少两个相邻的铁电电容器的表面。

公开(公告)号：US20050094452A1

公开(公告)日：2005-05-05

申请号：US10721480

申请日：2004-11-26

申请人： Kyu-Mann Lee ,  Kun-sang Park ,  Sang-don Nam

发明人： Kyu-Mann Lee ,  Kun-sang Park ,  Sang-don Nam

IPC分类号： G11C7/00 ,  H01L21/02 ,  H01L21/768 ,  H01L21/8246 ,  H01L27/115

CPC分类号： H01L28/55 ,  H01L21/76802 ,  H01L21/76829 ,  H01L21/76838 ,  H01L21/76846 ,  H01L21/7687 ,  H01L27/11502 ,  H01L27/11507 ,  H01L28/65 ,  H01L28/75

摘要： A ferroelectric memory device includes an interlayer dielectric layer and a a protection adhesion layer formed thereon. A buried contact extends through the protection adhesion layer and the interlayer dielectric layer. A lower electrode is on a portion of the protection adhesion layer that is adjacent to the buried contact and on the buried contact. A ferroelectric layer covers the lower electrode and the protection adhesion layer. An upper electrode overlaps the lower electrode and covers the ferroelectric layer. Related methods are also disclosed.

摘要翻译： 铁电存储器件包括层间绝缘层和形成在其上的保护粘合层。 掩埋触点延伸穿过保护粘合层和层间介电层。 下电极位于保护粘合层的与埋入触点相邻并且与埋入触点相邻的部分上。 铁电层覆盖下电极和保护粘合层。 上电极与下电极重叠并覆盖铁电体层。 还公开了相关方法。

公开(公告)号：US20050185486A9

公开(公告)日：2005-08-25

申请号：US10721480

申请日：2003-11-25

申请人： Kyu-Mann Lee ,  Kun-sang Park ,  Sang-don Nam

发明人： Kyu-Mann Lee ,  Kun-sang Park ,  Sang-don Nam

IPC分类号： G11C7/00 ,  H01L21/02 ,  H01L21/768 ,  H01L21/8246 ,  H01L27/115

CPC分类号： H01L28/55 ,  H01L21/76802 ,  H01L21/76829 ,  H01L21/76838 ,  H01L21/76846 ,  H01L21/7687 ,  H01L27/11502 ,  H01L27/11507 ,  H01L28/65 ,  H01L28/75

摘要： A ferroelectric memory device includes an interlayer dielectric layer and a a protection adhesion layer formed thereon. A buried contact extends through the protection adhesion layer and the interlayer dielectric layer. A lower electrode is on a portion of the protection adhesion layer that is adjacent to the buried contact and on the buried contact. A ferroelectric layer covers the lower electrode and the protection adhesion layer. An upper electrode overlaps the lower electrode and covers the ferroelectric layer. Related methods are also disclosed.