公开(公告)号：US20100084654A1

公开(公告)日：2010-04-08

申请号：US12571554

申请日：2009-10-01

申请人： Shunpei YAMAZAKI ,  Kengo AKIMOTO ,  Shigeki KOMORI ,  Hideki UOCHI ,  Tomoya FUTAMURA ,  Takahiro KASAHARA

发明人： Shunpei YAMAZAKI ,  Kengo AKIMOTO ,  Shigeki KOMORI ,  Hideki UOCHI ,  Tomoya FUTAMURA ,  Takahiro KASAHARA

IPC分类号： H01L33/00 ,  H01L29/786

CPC分类号： G02F1/136204 ,  H01L27/0248 ,  H01L27/1225 ,  H01L27/124 ,  H01L33/0041 ,  H01L2924/0002 ,  H01L2924/00

摘要： In order to take advantage of the properties of a display device including an oxide semiconductor, a protective circuit and the like having appropriate structures and a small occupied area are necessary. The protective circuit is formed using a non-linear element which includes a gate insulating film covering a gate electrode; a first oxide semiconductor layer over the gate insulating film; a channel protective layer covering a region which overlaps with a channel formation region of the first oxide semiconductor layer; and a first wiring layer and a second wiring layer each of which is formed by stacking a conductive layer and a second oxide semiconductor layer and over the first oxide semiconductor layer. The gate electrode is connected to a scan line or a signal line, the first wiring layer or the second wiring layer is directly connected to the gate electrode.

摘要翻译： 为了利用包括氧化物半导体的显示装置的特性，需要具有适当结构和占用面积小的保护电路等。 保护电路使用非线性元件形成，该非线性元件包括覆盖栅电极的栅极绝缘膜; 栅绝缘膜上的第一氧化物半导体层; 覆盖与第一氧化物半导体层的沟道形成区重叠的区域的沟道保护层; 以及通过层叠导电层和第二氧化物半导体层并在第一氧化物半导体层上形成的第一布线层和第二布线层。 栅电极连接到扫描线或信号线，第一布线层或第二布线层直接连接到栅电极。

公开(公告)号：US20100065842A1

公开(公告)日：2010-03-18

申请号：US12556590

申请日：2009-09-10

申请人： Shunpei YAMAZAKI ,  Kengo AKIMOTO ,  Shigeki KOMORI ,  Hideki UOCHI

发明人： Shunpei YAMAZAKI ,  Kengo AKIMOTO ,  Shigeki KOMORI ,  Hideki UOCHI

IPC分类号： H01L29/786 ,  H01L29/12 ,  H01L21/336

CPC分类号： H01L27/124 ,  H01L27/1225 ,  H01L29/7869

摘要： It is an object of the present invention to provide a thin film transistor in which an oxide semiconductor film containing indium (In), gallium (Ga), and zinc (Zn) is used and contact resistance of a source or a drain electrode layer is reduced, and a manufacturing method thereof. An IGZO layer is provided over the source electrode layer and the drain electrode layer, and source and drain regions having lower oxygen concentration than the IGZO semiconductor layer are intentionally provided between the source and drain electrode layers and the gate insulating layer, so that ohmic contact is made.

摘要翻译： 本发明的目的是提供一种薄膜晶体管，其中使用含有铟（In），镓（Ga）和锌（Zn）的氧化物半导体膜，源极或漏极层的接触电阻为 还原及其制造方法。 在源极电极层和漏极电极层上设置有IGZO层，在源电极层和漏极电极层以及栅极绝缘层之间有意设置具有比IGZO半导体层低的氧浓度的源极和漏极区域，使得欧姆接触 是做的

公开(公告)号：US20100065839A1

公开(公告)日：2010-03-18

申请号：US12553122

申请日：2009-09-03

申请人： Shunpei YAMAZAKI ,  Kengo AKIMOTO ,  Shigeki KOMORI ,  Hideki UOCHI ,  Tomoya FUTAMURA ,  Takahiro KASAHARA

发明人： Shunpei YAMAZAKI ,  Kengo AKIMOTO ,  Shigeki KOMORI ,  Hideki UOCHI ,  Tomoya FUTAMURA ,  Takahiro KASAHARA

IPC分类号： H01L33/00

CPC分类号： H01L27/1214 ,  G02F1/13624 ,  G02F1/1368 ,  H01L27/1225 ,  H01L27/124 ,  H01L29/66742 ,  H01L29/7869 ,  H01L29/78693

摘要： A protective circuit includes a non-linear element, which includes a gate electrode, a gate insulating layer covering the gate electrode, a pair of first and second wiring layers whose end portions overlap with the gate electrode over the gate insulating layer and in which a second oxide semiconductor layer and a conductive layer are stacked, and a first oxide semiconductor layer which overlaps with at least the gate electrode and which is in contact with the gate insulating layer, side face portions and part of top face portions of the conductive layer and side face portions of the second oxide semiconductor layer in the first wiring layer and the second wiring layer. Over the gate insulating layer, oxide semiconductor layers with different properties are bonded to each other, whereby stable operation can be performed as compared with Schottky junction. Thus, the junction leakage can be decreased and the characteristics of the non-linear element can be improved.

摘要翻译： 保护电路包括非线性元件，其包括栅电极，覆盖栅电极的栅极绝缘层，一对第一和第二布线层，其端部与栅极绝缘层上的栅电极重叠，并且其中 层叠第二氧化物半导体层和导电层，以及与至少栅电极重叠并与栅极绝缘层接触的第一氧化物半导体层，导电层的侧面部和顶面部的一部分，以及 在第一布线层和第二布线层中的第二氧化物半导体层的侧面部分。 在栅极绝缘层上，具有不同性质的氧化物半导体层彼此结合，由此可以进行与肖特基结的稳定操作。 因此，可以降低结漏电，提高非线性元件的特性。

公开(公告)号：US20100051940A1

公开(公告)日：2010-03-04

申请号：US12549415

申请日：2009-08-28

申请人： Shunpei YAMAZAKI ,  Kengo AKIMOTO

发明人： Shunpei YAMAZAKI ,  Kengo AKIMOTO

IPC分类号： H01L29/786 ,  H01L21/34

CPC分类号： H01L29/78696 ,  H01L21/02318 ,  H01L21/02323 ,  H01L21/0234 ,  H01L21/02565 ,  H01L29/247 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/7869 ,  H01L29/78693

摘要： An object is to provide favorable interface characteristics of a thin film transistor including an oxide semiconductor layer without mixing of an impurity such as moisture. Another object is to provide a semiconductor device including a thin film transistor having excellent electric characteristics and high reliability, and a method by which a semiconductor device can be manufactured with high productivity. A main point is to perform oxygen radical treatment on a surface of a gate insulating layer. Accordingly, there is a peak of the oxygen concentration at an interface between the gate insulating layer and a semiconductor layer, and the oxygen concentration of the gate insulating layer has a concentration gradient. The oxygen concentration is increased toward the interface between the gate insulating layer and the semiconductor layer.

摘要翻译： 本发明的目的是提供一种薄膜晶体管的有利的界面特性，该薄膜晶体管包括氧化物半导体层，而不混入杂质如水分。 另一个目的是提供一种包括具有优异的电特性和高可靠性的薄膜晶体管的半导体器件，以及可以以高生产率制造半导体器件的方法。 要点是在栅极绝缘层的表面进行氧自由基处理。 因此，在栅极绝缘层与半导体层之间的界面处存在氧浓度的峰值，并且栅极绝缘层的氧浓度具有浓度梯度。 氧浓度朝向栅极绝缘层和半导体层之间的界面增加。

公开(公告)号：US20100025677A1

公开(公告)日：2010-02-04

申请号：US12511273

申请日：2009-07-29

申请人： Shunpei YAMAZAKI ,  Hidekazu MIYAIRI ,  Kengo AKIMOTO ,  Kojiro SHIRAISHI

发明人： Shunpei YAMAZAKI ,  Hidekazu MIYAIRI ,  Kengo AKIMOTO ,  Kojiro SHIRAISHI

IPC分类号： H01L29/786 ,  H01L21/336

CPC分类号： H01L29/7869 ,  H01L27/1225 ,  H01L29/78606

摘要： To provide a semiconductor device including a thin film transistor having excellent electric characteristics and high reliability and a manufacturing method of the semiconductor device with high mass productivity. The summary is that an inverted-staggered (bottom-gate) thin film transistor is included in which an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer, a channel protective layer is provided in a region that overlaps a channel formation region of the semiconductor layer, and a buffer layer is provided between the semiconductor layer and source and drain electrodes. An ohmic contact is formed by intentionally providing the buffer layer having a higher carrier concentration than the semiconductor layer between the semiconductor layer and the source and drain electrodes.

摘要翻译： 提供一种包括具有优异的电特性和高可靠性的薄膜晶体管的半导体器件和具有高质量生产率的半导体器件的制造方法。 总而言之，包括使用含有In，Ga和Zn的氧化物半导体膜作为半导体层的反交错（底栅极）薄膜晶体管，沟道保护层设置在与 沟道形成区域，并且在半导体层和源极和漏极之间设置有缓冲层。 通过有意地提供具有比半导体层和源电极和漏电极之间的半导体层更高的载流子浓度的缓冲层来形成欧姆接触。

公开(公告)号：US20120108007A1

公开(公告)日：2012-05-03

申请号：US13346963

申请日：2012-01-10

申请人： Shunpei YAMAZAKI ,  Hidekazu MIYAIRI ,  Kengo AKIMOTO ,  Kojiro SHIRAISHI

发明人： Shunpei YAMAZAKI ,  Hidekazu MIYAIRI ,  Kengo AKIMOTO ,  Kojiro SHIRAISHI

IPC分类号： H01L21/336

CPC分类号： H01L29/66969 ,  H01L21/46 ,  H01L27/1225 ,  H01L29/7869

摘要： It is an object to provide a semiconductor device including a thin film transistor with favorable electric properties and high reliability, and a method for manufacturing the semiconductor device with high productivity. In an inverted staggered (bottom gate) thin film transistor, an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer, and a buffer layer formed using a metal oxide layer is provided between the semiconductor layer and a source and drain electrode layers. The metal oxide layer is intentionally provided as the buffer layer between the semiconductor layer and the source and drain electrode layers, whereby ohmic contact is obtained.

摘要翻译： 本发明的目的是提供一种包括具有良好的电性能和高可靠性的薄膜晶体管的半导体器件，以及一种以高生产率制造半导体器件的方法。 在倒置交错（底栅极）薄膜晶体管中，使用含有In，Ga和Zn的氧化物半导体膜作为半导体层，并且在半导体层和源之间设置使用金属氧化物层形成的缓冲层， 漏电极层。 有意地提供金属氧化物层作为半导体层与源极和漏极电极层之间的缓冲层，从而获得欧姆接触。

公开(公告)号：US20110133183A1

公开(公告)日：2011-06-09

申请号：US13020216

申请日：2011-02-03

申请人： Shunpei YAMAZAKI ,  Kengo AKIMOTO ,  Shigeki KOMORI ,  Hideki UOCHI ,  Rihito WADA ,  Yoko CHIBA

发明人： Shunpei YAMAZAKI ,  Kengo AKIMOTO ,  Shigeki KOMORI ,  Hideki UOCHI ,  Rihito WADA ,  Yoko CHIBA

IPC分类号： H01L29/786

CPC分类号： H01L27/1225 ,  G02F1/13392 ,  G02F1/13458 ,  G02F2001/13398 ,  G09G2300/0804 ,  H01L27/124 ,  H01L27/3262 ,  H01L27/3276 ,  H01L29/04 ,  H01L29/24 ,  H01L29/41733 ,  H01L29/66969 ,  H01L29/7869 ,  H01L51/5221

摘要： A display device includes a pixel portion in which a pixel electrode layer is arranged in a matrix, and an inverted staggered thin film transistor having a combination of at least two kinds of oxide semiconductor layers with different amounts of oxygen is provided corresponding to the pixel electrode layer. In the periphery of the pixel portion in this display device, a pad portion is provided to be electrically connected to a common electrode layer formed on a counter substrate through a conductive layer made of the same material as the pixel electrode layer. One objection of our invention to prevent a defect due to separation of a thin film in various kinds of display devices is realized, by providing a structure suitable for a pad portion provided in a display panel.

摘要翻译： 显示装置包括其中像素电极层布置在矩阵中的像素部分，并且相应于像素电极设置具有至少两种具有不同量的氧的氧化物半导体层的组合的倒置交错薄膜晶体管 层。 在该显示装置的像素部的周围，设置有通过与像素电极层相同的材料形成的导电层与形成在对置基板上的公共电极层电连接的焊盘部。 通过提供适合于设置在显示面板中的焊盘部分的结构，实现了本发明防止由于各种显示装置中的薄膜分离引起的缺陷的一个反对意见。

公开(公告)号：US20110115763A1

公开(公告)日：2011-05-19

申请号：US13013054

申请日：2011-01-25

申请人： Shunpei YAMAZAKI ,  Hidekazu MIYAIRI ,  Kengo AKIMOTO ,  Kojiro SHIRAISHI

发明人： Shunpei YAMAZAKI ,  Hidekazu MIYAIRI ,  Kengo AKIMOTO ,  Kojiro SHIRAISHI

IPC分类号： G06F3/038 ,  H01L29/786

CPC分类号： H01L29/66969 ,  H01L21/46 ,  H01L27/1225 ,  H01L29/7869

摘要： It is an object to provide a semiconductor device including a thin film transistor with favorable electric properties and high reliability, and a method for manufacturing the semiconductor device with high productivity. In an inverted staggered (bottom gate) thin film transistor, an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer, and a buffer layer formed using a metal oxide layer is provided between the semiconductor layer and a source and drain electrode layers. The metal oxide layer is intentionally provided as the buffer layer between the semiconductor layer and the source and drain electrode layers, whereby ohmic contact is obtained.

摘要翻译： 本发明的目的是提供一种包括具有良好的电性能和高可靠性的薄膜晶体管的半导体器件，以及一种以高生产率制造半导体器件的方法。 在倒置交错（底栅极）薄膜晶体管中，使用含有In，Ga和Zn的氧化物半导体膜作为半导体层，并且在半导体层和源之间设置使用金属氧化物层形成的缓冲层， 漏电极层。 有意地提供金属氧化物层作为半导体层与源极和漏极电极层之间的缓冲层，从而获得欧姆接触。

公开(公告)号：US20110024751A1

公开(公告)日：2011-02-03

申请号：US12846556

申请日：2010-07-29

申请人： Shunpei YAMAZAKI ,  Kengo AKIMOTO ,  Masashi TSUBUKU ,  Toshinari SASAKI ,  Hideaki KUWABARA

发明人： Shunpei YAMAZAKI ,  Kengo AKIMOTO ,  Masashi TSUBUKU ,  Toshinari SASAKI ,  Hideaki KUWABARA

IPC分类号： H01L27/12 ,  H01L29/786 ,  H01L21/84

CPC分类号： H01L33/0041 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1248 ,  H01L29/78606 ,  H01L29/7869 ,  H01L29/78696 ,  H01L2924/0002 ,  H01L2924/00

摘要： In a bottom-gate thin film transistor using the stack of the first oxide semiconductor layer and the second oxide semiconductor layer, an oxide insulating layer serving as a channel protective layer is formed over and in contact with part of the oxide semiconductor layer overlapping with a gate electrode layer. In the same step as formation of the insulating layer, an oxide insulating layer covering a peripheral portion (including a side surface) of the stack of the oxide semiconductor layers is formed.

摘要翻译： 在使用第一氧化物半导体层和第二氧化物半导体层的堆叠的底栅极薄膜晶体管中，形成作为沟道保护层的氧化物绝缘层，与氧化物半导体层的与 栅电极层。 在与绝缘层的形成相同的步骤中，形成覆盖氧化物半导体层的叠层的周边部分（包括侧面）的氧化物绝缘层。

公开(公告)号：US20100084651A1

公开(公告)日：2010-04-08

申请号：US12570481

申请日：2009-09-30

申请人： Shunpei YAMAZAKI ,  Kengo AKIMOTO ,  Atsushi UMEZAKI

发明人： Shunpei YAMAZAKI ,  Kengo AKIMOTO ,  Atsushi UMEZAKI

IPC分类号： H01L33/00

CPC分类号： H01L27/1225 ,  G02F1/13624 ,  H01L27/124 ,  H01L27/3276 ,  H01L29/7869

摘要： With an increase in the definition of a display device, the number of pixels is increased, and thus the numbers of gate lines and signal lines are increased. Due to the increase in the numbers of gate lines and signal lines, it is difficult to mount an IC chip having a driver circuit for driving the gate and signal lines by bonding or the like, which causes an increase in manufacturing costs. A pixel portion and a driver circuit for driving the pixel portion are formed over one substrate. At least a part of the driver circuit is formed using an inverted staggered thin film transistor in which an oxide semiconductor is used. The driver circuit as well as the pixel portion is provided over the same substrate, whereby manufacturing costs are reduced.

摘要翻译： 随着显示装置的定义的增加，像素的数量增加，因此栅极线和信号线的数量增加。 由于栅极线和信号线的数量增加，难以安装具有用于通过接合等驱动栅极和信号线的驱动电路的IC芯片，这导致制造成本的增加。 用于驱动像素部分的像素部分和驱动电路形成在一个衬底上。 使用其中使用氧化物半导体的反交错薄膜晶体管形成驱动电路的至少一部分。 驱动电路以及像素部分设置在相同的基板上，由此降低了制造成本。