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    Wafer based temperature sensors for characterizing chemical mechanical polishing processes
    41.
    发明授权
    Wafer based temperature sensors for characterizing chemical mechanical polishing processes 有权
    用于表征化学机械抛光工艺的基于晶圆的温度传感器

    公开(公告)号：US06562185B2

    公开(公告)日：2003-05-13

    申请号：US09955552

    申请日：2001-09-18

    申请人： Steven C. Avanzino ,  Bhanwar Singh ,  Bharath Rangarajan ,  Ramkumar Subramanian

    发明人： Steven C. Avanzino ,  Bhanwar Singh ,  Bharath Rangarajan ,  Ramkumar Subramanian

    IPC分类号： B24B3700

    CPC分类号： B24B37/015

    摘要： A system for characterizing a chemical mechanical polishing process is provided. The system includes a wafer that has a metal, polysilicon, and/or dielectric layer and/or substrate and a temperature sensor located in and/or on the metal, polysilicon and/or dielectric layer and/or substrate. The system also includes a temperature monitoring system that can read the wafer temperature from the temperature sensors and that can analyze the wafer temperature to characterize the chemical mechanical polishing process. Such characterization includes producing information concerning relationships between wafer temperature and polishing rate, polishing uniformity and introduction of defects during polishing. Such relationships are correlated with wafer temperature as related to parameters like polishing time, pressure, speed, slurry properties and wafer/metal layer properties. Such characterization can be employed, for example, to better understand a CMP process, to facilitate initializing subsequent chemical mechanical polishing processes and/or apparatus and/or to control such chemical mechanical polishing processes and/or apparatus by monitoring and/or controlling wafer temperature.

    摘要翻译： 提供了表征化学机械抛光工艺的系统。 该系统包括具有位于金属，多晶硅和/或电介质层和/或衬底中和/或上的金属，多晶硅和/或电介质层和/或衬底和温度传感器的晶片。 该系统还包括一个温度监控系统，可以从温度传感器读取晶圆温度，并且可以分析晶圆温度以表征化学机械抛光过程。 这种表征包括产生关于晶片温度和抛光速率之间的关系的信息，抛光均匀性和在抛光期间引入缺陷。 这些关系与晶片温度相关，如与抛光时间，压力，速度，浆料性质和晶片/金属层性质等参数相关。 可以采用这种表征，例如，更好地理解CMP工艺，以便于初始化随后的化学机械抛光工艺和/或设备和/或通过监测和/或控制晶片温度来控制这种化学机械抛光工艺和/或设备 。

    Use of multiple tips on AFM to deconvolve tip effects
    42.
    发明授权
    Use of multiple tips on AFM to deconvolve tip effects 有权
    在AFM上使用多个提示来解压缩尖端效应

    公开(公告)号：US06545273B1

    公开(公告)日：2003-04-08

    申请号：US09729292

    申请日：2000-12-04

    申请人： Bhanwar Singh ,  Bharath Rangarajan ,  Sanjay K. Yedur

    发明人： Bhanwar Singh ,  Bharath Rangarajan ,  Sanjay K. Yedur

    IPC分类号： G01N2300

    CPC分类号： G01Q40/00 ,  Y10S977/874

    摘要： The present invention comprises a system for deconvolving tip effects associated with scanning tips in scanning probe microscopes and other scanning systems. The system comprises a scanning system operable to scan a feature or artifact with multiple, different type scanning tips and generate scan data associated therewith and a processor operably coupled to the scanning system. The processor is adapted to determine characteristics associated with the multiple, different type scanning tips using the scan data associated therewith. The present invention also comprises a method of determining scanning probe microscope tip effects. The method comprises the steps of scanning a feature or artifact with a plurality of different type scanning tips, resulting in a plurality of scan data sets associated with the different type scanning tips. The tip effects associated with the different type scanning tips are then deconvolved using the plurality of scan data sets.

    摘要翻译： 本发明包括一种用于在扫描探针显微镜和其它扫描系统中与扫描尖端相关联的尖端效应的去卷积的系统。 该系统包括扫描系统，其可操作以用多个不同类型的扫描尖端扫描特征或伪像，并且生成与其相关联的扫描数据和可操作地耦合到扫描系统的处理器。 处理器适于使用与其相关联的扫描数据来确定与多个不同类型扫描尖端相关联的特性。 本发明还包括确定扫描探针显微镜尖端效应的方法。 该方法包括以多个不同类型扫描尖端扫描特征或伪影的步骤，导致与不同类型的扫描尖端相关联的多个扫描数据集。 然后使用多个扫描数据集对与不同类型的扫描尖端相关联的尖端效应进行去卷积。

    Using localized ionizer to reduce electrostatic charge from wafer and mask
    43.
    发明授权
    Using localized ionizer to reduce electrostatic charge from wafer and mask 有权
    使用局部电离器来减少晶片和掩模的静电电荷

    公开(公告)号：US06507474B1

    公开(公告)日：2003-01-14

    申请号：US09597126

    申请日：2000-06-19

    申请人： Bhanwar Singh ,  Ramkumar Subramanian ,  Khoi A. Phan ,  Bryan K. Choo ,  Bharath Rangarajan

    发明人： Bhanwar Singh ,  Ramkumar Subramanian ,  Khoi A. Phan ,  Bryan K. Choo ,  Bharath Rangarajan

    IPC分类号： H01T2300

    CPC分类号： G03F7/70616 ,  G03F7/70941

    摘要： One aspect of the present invention elates to a method of reducing electrostatic charges on a patterned photoresist to improve evaluation of the developed photoresist, involving the steps of evaluating the patterned photoresist to determine if electrostatic charges exist thereon; positioning an ionizer near the patterned photoresist, the ionizer generating ions thereby reducing the electrostatic charges on the patterned photoresist; and evaluating the patterned photoresist with an electron beam. Another aspect of the present invention relates to a system for reducing electrostatic charges on a patterned photoresist, containing a charge sensor for determining if electrostatic charges exist on the patterned photoresist and measuring the electrostatic charges; an ionizer positioned near the patterned photoresist having electrostatic charges thereon for reducing the electrostatic charges on the patterned photoresist; a controller for setting at least one of time of ion generation and amount of ion generation by the ionizer, the controller coupled to the charge sensor and the ionizer; and a scanning electron microscope or an atomic force microscope for evaluating the patterned photoresist having reduced electrostatic charges thereon with an electron beam.

    摘要翻译： 本发明的一个方面是提供减少图案化光致抗蚀剂上的静电电荷以改进对显影光致抗蚀剂的评估的方法，包括评估图案化光致抗蚀剂以确定静电电荷是否存在于其中的步骤; 在图案化的光致抗蚀剂附近定位电离器，离子发生器产生离子，从而减少图案化光致抗蚀剂上的静电电荷; 并用电子束评估图案化的光致抗蚀剂。 本发明的另一方面涉及一种用于减少图案化光致抗蚀剂上的静电电荷的系统，其包含用于确定图案化光致抗蚀剂上是否存在静电电荷并测量静电电荷的电荷传感器; 位于图案化的光致抗蚀剂附近的电离器，其上具有静电电荷，用于减少图案化光致抗蚀剂上的静电电荷; 用于设置离子发生时间和离子发生量中的至少一个的控制器，耦合到电荷传感器和离子发生器的控制器; 以及扫描电子显微镜或原子力显微镜，用于用电子束评估其上具有降低的静电电荷的图案化光致抗蚀剂。

    System and method to facilitate removal of defects from a substrate
    44.
    发明授权
    System and method to facilitate removal of defects from a substrate 失效
    有助于从基底去除缺陷的系统和方法

    公开(公告)号：US06486072B1

    公开(公告)日：2002-11-26

    申请号：US09709974

    申请日：2000-11-10

    申请人： Khoi A. Phan ,  Bharath Rangarajan ,  Bhanwar Singh

    发明人： Khoi A. Phan ,  Bharath Rangarajan ,  Bhanwar Singh

    IPC分类号： H01L21302

    CPC分类号： H01L21/02046

    摘要： A system and method are disclosed for facilitating removal of a defect from a substrate. A charge is applied at the surface of substrate, such as in the form of an ionized gas, to weaken attractive forces between the defect and the substrate. As a result of weakening the attractive forces, a suitable defect removal system may be employed to remove the defect.

    摘要翻译： 公开了一种用于便于从基底去除缺陷的系统和方法。 在基板的表面，例如以电离气体的形式施加电荷，以减弱缺陷和基板之间的吸引力。 作为吸引力减弱的结果，可以采用合适的缺陷去除系统来去除缺陷。

    Conducting electron beam resist thin film layer for patterning of mask plates
    45.
    发明授权
    Conducting electron beam resist thin film layer for patterning of mask plates 失效
    用于掩模板图形化的导电电子束抗蚀剂薄膜层

    公开(公告)号：US06482558B1

    公开(公告)日：2002-11-19

    申请号：US09782382

    申请日：2001-02-12

    申请人： Bhanwar Singh ,  Ramkumar Subramanian ,  Bharath Rangarajan

    发明人： Bhanwar Singh ,  Ramkumar Subramanian ,  Bharath Rangarajan

    IPC分类号： G03F900

    CPC分类号： G03F7/093 ,  G03F1/40 ,  G03F1/50 ,  Y10S430/143

    摘要： One aspect of the present invention relates to a system for dissipating electrostatic charge on a mask plate structure containing the mask plate structure containing a substrate, a chromium layer over the substrate, and a conductive polymer over the chromium layer; a conductive structure coupled to the mask plate structure which allows accumulated electrostatic charge to flow from the mask plate structure; a conductive path between the conductive structure and a ground, wherein the conductive path inacludes a switch controlled by a controller; and a detector coupled to the controller for signaling the controller when the accumulation of electrostatic charge is detected. Another aspect of the present invention relates to a method for dissipating charge accumulation during patterning of mask plates using a conductive polymer layer involving the steps of providing a mask substrate having a chromium layer; depositing a conductive polymer layer over the chromium layer; connecting a conductive structure to the mask substrate; irradiating portions of the mask substrate with an electron beam; detecting whether electrostatic charge exists on the mask substrate; and if electrostatic charge is detected, closing a circuit whereby the conductive structure is grounded to permit a flow of electrostatic charge from the mask substrate to the ground.

    摘要翻译： 本发明的一个方面涉及一种用于在掩模板结构上耗散静电电荷的系统，该系统包含含有衬底的掩模板结构，在衬底上的铬层和在铬层上的导电聚合物; 耦合到掩模板结构的导电结构，其允许积聚的静电电荷从掩模板结构流动; 导电结构和地之间的导电路径，其中导电路径不允许由控制器控制的开关; 以及耦合到控制器的检测器，用于在检测到静电电荷的累积时用于发信号通知控制器。 本发明的另一方面涉及一种使用导电聚合物层在掩模板图案化期间耗散电荷累积的方法，包括以下步骤：提供具有铬层的掩模基板; 在所述铬层上沉积导电聚合物层; 将导电结构连接到所述掩模基板; 用电子束照射掩模基板的部分; 检测在掩模基板上是否存在静电电荷; 并且如果检测到静电电荷，则关闭电路，由此导电结构接地以允许静电电荷从掩模基板流到地面。

    Method to produce small space pattern using plasma polymerization layer
    48.
    发明授权
    Method to produce small space pattern using plasma polymerization layer 失效
    使用等离子体聚合层产生小空间图案的方法

    公开(公告)号：US06416933B1

    公开(公告)日：2002-07-09

    申请号：US09283889

    申请日：1999-04-01

    申请人： Bhanwar Singh ,  Bharath Rangarajan ,  Wenge Yang

    发明人： Bhanwar Singh ,  Bharath Rangarajan ,  Wenge Yang

    IPC分类号： G03C500

    CPC分类号： H01L21/32139 ,  H01L21/0276 ,  H01L21/0337 ,  H01L21/0338 ,  H01L21/31138 ,  H01L21/31144 ,  H01L21/312

    摘要： The present invention relates to a method for forming an etch mask. A photoresist layer is patterned, wherein d1 is a smallest space dimension of an exposed area of a layer underlying the photoresist layer. A polymer layer is formed to be conformal to the patterned photoresist layer and exposed portions of the underlayer. The polymer layer is etched to form polymer sidewalls, the polymer sidewalls reducing the smallest space dimension of the exposed underlayer area to d2, wherein d2

    摘要翻译： 本发明涉及一种形成蚀刻掩模的方法。 图案化光致抗蚀剂层，其中d1是光致抗蚀剂层下面的层的暴露区域的最小空间尺寸。 聚合物层被形成为与图案化的光致抗蚀剂层和底层的暴露部分共形。 蚀刻聚合物层以形成聚合物侧壁，聚合物侧壁将暴露的底层区域的最小空间尺寸减小到d2，其中d2

    Multiple nozzles for dispensing resist
    49.
    发明授权
    Multiple nozzles for dispensing resist 有权
    用于分配抗蚀剂的多个喷嘴

    公开(公告)号：US06376013B1

    公开(公告)日：2002-04-23

    申请号：US09413143

    申请日：1999-10-06

    申请人： Bharath Rangarajan ,  Bhanwar Singh ,  Sanjay K. Yedur ,  Michael K. Templeton

    发明人： Bharath Rangarajan ,  Bhanwar Singh ,  Sanjay K. Yedur ,  Michael K. Templeton

    IPC分类号： B05D100

    CPC分类号： H01L21/6715 ,  B05B7/0408 ,  B05C11/02 ,  B05C11/08 ,  G03F7/162

    摘要： A system and method is provided that facilitates the application of a uniform layer of photoresist material spincoated onto a semiconductor substrate (e.g wafer). The present invention accomplishes this end by utilizing a measurement system that measures the thickness uniformity of the photoresist material applied on a test wafer by a nozzle, and then adjusting the viscosity of the photoresist material by varying the ratio in a solvent/resist mixture, and/or adjusting the temperature of the mixture. A system and method that employs a plurality of nozzles is also provided that disperses resist at different annular regions on a wafer to facilitate the application of a uniform layer of photoresist material spincoated onto the wafer. The system and method utilize a measurement system that measures the thickness and thickness uniformity of each layer of photoresist material applied at each annular region of the wafer. The measured thickness uniformity and overall thickness for each annular region is then used to adjust the volume and viscosity of a solvent/resist mixture applied through each nozzle.

    摘要翻译： 提供了一种系统和方法，其有利于将均匀的光致抗蚀剂材料层涂覆在半导体衬底（例如晶片）上。 本发明通过利用测量系统来实现这一目的，测量系统通过喷嘴测量施加在测试晶片上的光致抗蚀剂材料的厚度均匀性，然后通过改变溶剂/抗蚀剂混合物中的比例来调节光致抗蚀剂材料的粘度，以及 /或调整混合物的温度。 还提供了使用多个喷嘴的系统和方法，其将抗蚀剂分散在晶片上的不同环形区域，以便于将均匀的光致抗蚀剂材料层涂覆在晶片上。 该系统和方法利用测量系统，其测量在晶片的每个环形区域施加的每层光致抗蚀剂材料的厚度和厚度均匀性。 然后使用测量的每个环形区域的厚度均匀性和总厚度来调节通过每个喷嘴施加的溶剂/抗蚀剂混合物的体积和粘度。