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公开(公告)号：US07910911B2
公开(公告)日：2011-03-22
申请号：US12511602
申请日：2009-07-29
IPC分类号： H01L47/00
CPC分类号： H01L45/1675 , H01L45/06 , H01L45/1233 , H01L45/126 , H01L45/144
摘要： An embodiment of the present invention includes a phase change memory (PCM) structure configurable for use as a nonvolatile storage element. The element includes at least one bottom electrode; at least one phase change material layer on at least a portion of an upper surface of the bottom electrode; and at least one heater layer on at least a portion of an upper surface of the phase change material layer, wherein the heater layer has a tapered shape such that an upper surface of the heater layer has a cross-sectional width that is longer than a cross-sectional width of a bottom surface of the heater layer contacting the phase change material layer.
摘要翻译： 本发明的实施例包括可配置为用作非易失性存储元件的相变存储器（PCM）结构。 该元件包括至少一个底部电极; 在所述底部电极的上表面的至少一部分上的至少一个相变材料层; 以及在所述相变材料层的上表面的至少一部分上的至少一个加热层，其中所述加热器层具有锥形形状，使得所述加热器层的上表面的横截面宽度比 加热器层的底表面的与相变材料层接触的横截面宽度。
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公开(公告)号：US20090001341A1
公开(公告)日：2009-01-01
申请号：US11771501
申请日：2007-06-29
IPC分类号： H01L45/00
CPC分类号： H01L45/1675 , H01L45/06 , H01L45/1233 , H01L45/126 , H01L45/144
摘要： An embodiment of the present invention includes a method of forming a nonvolatile phase change memory (PCM) cell. This method includes forming at least one bottom electrode; forming at least one phase change material layer on at least a portion of an upper surface of the bottom electrode; forming at least one heater layer on at least a portion of an upper surface of the phase change material layer; and shaping the heater layer into a tapered shape, such that an upper surface of the heater layer has a cross-sectional width that is longer than a cross-sectional width of a bottom surface of the heater layer contacting the phase change material layer.Another embodiment of the present invention includes a phase change memory (PCM) structure configurable for use as a nonvolatile storage element. The element includes at least one bottom electrode; at least one phase change material layer on at least a portion of an upper surface of the bottom electrode; and at least one heater layer on at least a portion of an upper surface of the phase change material layer, wherein the heater layer has a tapered shape such that an upper surface of the heater layer has a cross-sectional width that is longer than a cross-sectional width of a bottom surface of the heater layer contacting the phase change material layer.
摘要翻译： 本发明的实施例包括形成非易失性相变存储器（PCM）单元的方法。 该方法包括形成至少一个底部电极; 在所述底部电极的上表面的至少一部分上形成至少一个相变材料层; 在所述相变材料层的上表面的至少一部分上形成至少一个加热层; 并且将加热器层成形为锥形，使得加热器层的上表面的横截面宽度大于与相变材料层接触的加热器层的底表面的横截面宽度。 本发明的另一实施例包括可配置为用作非易失性存储元件的相变存储器（PCM）结构。 该元件包括至少一个底部电极; 在所述底部电极的上表面的至少一部分上的至少一个相变材料层; 以及在所述相变材料层的上表面的至少一部分上的至少一个加热层，其中所述加热器层具有锥形形状，使得所述加热器层的上表面的横截面宽度比 加热器层的底表面的与相变材料层接触的横截面宽度。
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公开(公告)号：US07906368B2
公开(公告)日：2011-03-15
申请号：US11771501
申请日：2007-06-29
IPC分类号： H01L21/06
CPC分类号： H01L45/1675 , H01L45/06 , H01L45/1233 , H01L45/126 , H01L45/144
摘要： An embodiment of the present invention includes a method of forming a nonvolatile phase change memory (PCM) cell. This method includes forming at least one bottom electrode; forming at least one phase change material layer on at least a portion of an upper surface of the bottom electrode; forming at least one heater layer on at least a portion of an upper surface of the phase change material layer; and shaping the heater layer into a tapered shape, such that an upper surface of the heater layer has a cross-sectional width that is longer than a cross-sectional width of a bottom surface of the heater layer contacting the phase change material layer.
摘要翻译： 本发明的实施例包括形成非易失性相变存储器（PCM）单元的方法。 该方法包括形成至少一个底部电极; 在所述底部电极的上表面的至少一部分上形成至少一个相变材料层; 在所述相变材料层的上表面的至少一部分上形成至少一个加热层; 并且将加热器层成形为锥形，使得加热器层的上表面的横截面宽度大于与相变材料层接触的加热器层的底表面的横截面宽度。
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公开(公告)号：US08030130B2
公开(公告)日：2011-10-04
申请号：US12541595
申请日：2009-08-14
IPC分类号： H01L21/06
CPC分类号： H01L27/2436 , H01L45/06 , H01L45/1233 , H01L45/141 , H01L45/143 , H01L45/144 , H01L45/148 , H01L45/1608 , H01L45/1683 , H01L45/1691
摘要： A method for fabricating a phase change memory device including memory cells includes patterning a via to a contact surface of a substrate corresponding to each of an array of conductive contacts to be connected to access circuitry, lining each via with a conformal conductive seed layer to the contact surface, forming a dielectric layer covering the conductive seed layer, and etching a center region of each via to the contact surface to expose the conformal conductive seed layer at the contact surface. The method further includes electroplating phase change material on exposed portions of the conformal conductive seed layer, recessing the phase change material within the center region forming a conductive material that remains conductive upon oxidation, on the recessed phase change material, oxidizing edges of the conformal conductive seed layer formed along sides of each via, and forming a top electrode over each memory cell.
摘要翻译： 一种用于制造包括存储单元的相变存储器件的方法包括将通孔图案化成与要连接到存取电路的导电触头阵列相对应的衬底的接触表面，将每个通孔用保形导电晶种层 形成覆盖导电种子层的电介质层，并将每个通孔的中心区域蚀刻到接触表面，以在接触表面露出共形导电种子层。 该方法还包括在保形导电晶种层的暴露部分上电镀相变材料，使形成导电材料的中心区域内的相变材料凹陷在凹陷相变材料上，该导电材料在凹陷相变材料上保持导电，保形导电 晶种层沿每个通孔的侧面形成，并且在每个存储单元上形成顶部电极。
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公开(公告)号：US08344351B2
公开(公告)日：2013-01-01
申请号：US13159594
申请日：2011-06-14
CPC分类号： H01L27/2436 , H01L45/06 , H01L45/1233 , H01L45/141 , H01L45/143 , H01L45/144 , H01L45/148 , H01L45/1608 , H01L45/1683 , H01L45/1691
摘要： A phase change memory device includes a plurality of memory cells comprising a substrate having a contact surface with an array of conductive contacts to be connected with access circuitry and a nitride layer formed at the contact surface. A plurality of vias are formed through the nitride layer to the contact surface and correspond to each conductive contact, the vias including a conformal conductive seed layer lining each via along exposed portions of the nitride layer and the contact surface and having oxidized edges. A dielectric layer is recessed within the conformal conductive seed layer and exposes a center region of each via. A phase change material is recessed within the center region of each via. A conductive material that remains conductive upon oxidation is formed over the phase change material. A top electrode is formed on each memory cell.
摘要翻译： 相变存储器件包括多个存储单元，其包括具有与要与接触电路连接的导电触点阵列的接触表面的衬底和在接触表面形成的氮化物层。 多个通孔通过氮化物层形成到接触表面并且对应于每个导电接触，通孔包括沿着氮化物层和接触表面的暴露部分并且具有氧化边缘的每个通孔衬里的共形导电种子层。 电介质层凹入保形导电晶种层内并露出每个通孔的中心区域。 相变材料凹陷在每个通孔的中心区域内。 在相变材料上形成氧化时保持导电的导电材料。 在每个存储单元上形成顶部电极。
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公开(公告)号：US20110240944A1
公开(公告)日：2011-10-06
申请号：US13159594
申请日：2011-06-14
CPC分类号： H01L27/2436 , H01L45/06 , H01L45/1233 , H01L45/141 , H01L45/143 , H01L45/144 , H01L45/148 , H01L45/1608 , H01L45/1683 , H01L45/1691
摘要： A method for fabricating a phase change memory device including memory cells includes patterning a via to a contact surface of a substrate corresponding to each of an array of conductive contacts to be connected to access circuitry, lining each via with a conformal conductive seed layer to the contact surface, forming a dielectric layer covering the conductive seed layer, and etching a center region of each via to the contact surface to expose the conformal conductive seed layer at the contact surface. The method further includes electroplating phase change material on exposed portions of the conformal conductive seed layer, recessing the phase change material within the center region forming a conductive material that remains conductive upon oxidation, on the recessed phase change material, oxidizing edges of the conformal conductive seed layer formed along sides of each via, and forming a top electrode over each memory cell.
摘要翻译： 一种用于制造包括存储单元的相变存储器件的方法包括将通孔图案化成与要连接到存取电路的导电触头阵列相对应的衬底的接触表面，将每个通孔用保形导电晶种层 形成覆盖导电种子层的电介质层，并将每个通孔的中心区域蚀刻到接触表面，以在接触表面露出共形导电种子层。 该方法还包括在保形导电晶种层的暴露部分上电镀相变材料，使形成导电材料的中心区域内的相变材料凹陷在凹陷相变材料上，该导电材料在凹陷相变材料上保持导电，保形导电 晶种层沿每个通孔的侧面形成，并且在每个存储单元上形成顶部电极。
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公开(公告)号：US20110037042A1
公开(公告)日：2011-02-17
申请号：US12541595
申请日：2009-08-14
CPC分类号： H01L27/2436 , H01L45/06 , H01L45/1233 , H01L45/141 , H01L45/143 , H01L45/144 , H01L45/148 , H01L45/1608 , H01L45/1683 , H01L45/1691
摘要： A method for fabricating a phase change memory device including memory cells includes patterning a via to a contact surface of a substrate corresponding to each of an array of conductive contacts to be connected to access circuitry, lining each via with a conformal conductive seed layer to the contact surface, forming a dielectric layer covering the conductive seed layer, and etching a center region of each via to the contact surface to expose the conformal conductive seed layer at the contact surface. The method further includes electroplating phase change material on exposed portions of the conformal conductive seed layer, recessing the phase change material within the center region forming a conductive material that remains conductive upon oxidation, on the recessed phase change material, oxidizing edges of the conformal conductive seed layer formed along sides of each via, and forming a top electrode over each memory cell.
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公开(公告)号：US20080142925A1
公开(公告)日：2008-06-19
申请号：US11612501
申请日：2006-12-19
申请人： Johannes G. Bednorz , Eric A. Joseph , Siegfried F. Karg , Chung H. Lam , Gerhard I. Meijer , Alejandro G. Schrott
发明人： Johannes G. Bednorz , Eric A. Joseph , Siegfried F. Karg , Chung H. Lam , Gerhard I. Meijer , Alejandro G. Schrott
IPC分类号： H01L29/86 , H01L21/4763
CPC分类号： H01L45/08 , H01L45/12 , H01L45/1233 , H01L45/1253 , H01L45/145 , H01L45/146 , H01L45/16 , H01L45/1641 , Y10S438/90
摘要： The present invention relates to a memory cell comprising: a resistive structure; at least two electrodes coupled to the resistive structure, and at least one hydrogen reservoir structure, wherein the application of an electrical signal to one of the at least two electrodes causes the electrical resistance of the resistive structure to be modified by altering a hydrogen-ion concentration in the resistive structure.
摘要翻译： 本发明涉及一种存储单元，包括：电阻结构; 耦合到电阻结构的至少两个电极和至少一个氢储存器结构，其中将电信号施加到所述至少两个电极中的一个电极导致通过改变氢离子来修改电阻结构的电阻 电阻结构中的浓度。
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公开(公告)号：US07709325B2
公开(公告)日：2010-05-04
申请号：US12043228
申请日：2008-03-06
IPC分类号： H01L21/8234 , H01L21/8244 , H01L21/336 , H01L21/44
CPC分类号： H01L45/06 , H01L45/1233 , H01L45/126 , H01L45/144 , H01L45/16
摘要： The present invention in one embodiment provides a method of forming an electrode that includes the steps of providing at least one metal stud in a layer of an interlevel dielectric material; forming a pillar of a first dielectric material atop the at least one metal stud; depositing an electrically conductive material atop the layer of the interlevel dielectric material and an exterior surface of the pillar, wherein a portion of the electrically conductive material is in electrical communication with the at least one metal stud; forming a layer of a second dielectric material atop the electrically conductive material and the substrate; and planarizing the layer of the second dielectric material to expose an upper surface of the electrically conductive material.
摘要翻译： 本发明在一个实施例中提供了形成电极的方法，其包括以下步骤：在层间电介质材料层中提供至少一个金属柱; 在所述至少一个金属螺柱的顶部上形成第一介电材料的柱; 在所述层间电介质材料的层的顶部和所述柱的外表面之上沉积导电材料，其中所述导电材料的一部分与所述至少一个金属螺柱电连通; 在导电材料和基底之上形成第二电介质材料层; 以及平坦化所述第二电介质材料的层以暴露所述导电材料的上表面。
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公开(公告)号：US20130087756A1
公开(公告)日：2013-04-11
申请号：US13268151
申请日：2011-10-07
CPC分类号： H01L45/1246 , H01L45/06 , H01L45/144 , H01L45/1616 , H01L45/1683
摘要： A memory cell structure and method to form such structure. An example memory cell includes a bottom electrode formed within a substrate. The memory cell also includes a phase change memory element in contact with the bottom electrode. The memory cell includes a liner laterally surrounding the phase change memory element. The liner includes dielectric material that is thermally conductive and electrically insulating. The memory cell includes an insulating dielectric layer laterally surrounding the liner. The insulating dielectric layer includes material having a lower thermal conductivity than that of the liner.
摘要翻译： 存储单元结构和形成这种结构的方法。 示例性存储单元包括形成在衬底内的底部电极。 存储单元还包括与底部电极接触的相变存储元件。 存储单元包括横向围绕相变存储元件的衬垫。 衬垫包括导热并电绝缘的电介质材料。 存储单元包括横向围绕衬垫的绝缘介电层。 绝缘介电层包括具有比衬里更低导热性的材料。
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