-
公开(公告)号：US20090001341A1
公开(公告)日：2009-01-01
申请号：US11771501
申请日：2007-06-29
IPC分类号： H01L45/00
CPC分类号： H01L45/1675 , H01L45/06 , H01L45/1233 , H01L45/126 , H01L45/144
摘要： An embodiment of the present invention includes a method of forming a nonvolatile phase change memory (PCM) cell. This method includes forming at least one bottom electrode; forming at least one phase change material layer on at least a portion of an upper surface of the bottom electrode; forming at least one heater layer on at least a portion of an upper surface of the phase change material layer; and shaping the heater layer into a tapered shape, such that an upper surface of the heater layer has a cross-sectional width that is longer than a cross-sectional width of a bottom surface of the heater layer contacting the phase change material layer.Another embodiment of the present invention includes a phase change memory (PCM) structure configurable for use as a nonvolatile storage element. The element includes at least one bottom electrode; at least one phase change material layer on at least a portion of an upper surface of the bottom electrode; and at least one heater layer on at least a portion of an upper surface of the phase change material layer, wherein the heater layer has a tapered shape such that an upper surface of the heater layer has a cross-sectional width that is longer than a cross-sectional width of a bottom surface of the heater layer contacting the phase change material layer.
摘要翻译： 本发明的实施例包括形成非易失性相变存储器（PCM）单元的方法。 该方法包括形成至少一个底部电极; 在所述底部电极的上表面的至少一部分上形成至少一个相变材料层; 在所述相变材料层的上表面的至少一部分上形成至少一个加热层; 并且将加热器层成形为锥形，使得加热器层的上表面的横截面宽度大于与相变材料层接触的加热器层的底表面的横截面宽度。 本发明的另一实施例包括可配置为用作非易失性存储元件的相变存储器（PCM）结构。 该元件包括至少一个底部电极; 在所述底部电极的上表面的至少一部分上的至少一个相变材料层; 以及在所述相变材料层的上表面的至少一部分上的至少一个加热层，其中所述加热器层具有锥形形状，使得所述加热器层的上表面的横截面宽度比 加热器层的底表面的与相变材料层接触的横截面宽度。
-
公开(公告)号：US07906368B2
公开(公告)日：2011-03-15
申请号：US11771501
申请日：2007-06-29
IPC分类号： H01L21/06
CPC分类号： H01L45/1675 , H01L45/06 , H01L45/1233 , H01L45/126 , H01L45/144
摘要： An embodiment of the present invention includes a method of forming a nonvolatile phase change memory (PCM) cell. This method includes forming at least one bottom electrode; forming at least one phase change material layer on at least a portion of an upper surface of the bottom electrode; forming at least one heater layer on at least a portion of an upper surface of the phase change material layer; and shaping the heater layer into a tapered shape, such that an upper surface of the heater layer has a cross-sectional width that is longer than a cross-sectional width of a bottom surface of the heater layer contacting the phase change material layer.
摘要翻译： 本发明的实施例包括形成非易失性相变存储器（PCM）单元的方法。 该方法包括形成至少一个底部电极; 在所述底部电极的上表面的至少一部分上形成至少一个相变材料层; 在所述相变材料层的上表面的至少一部分上形成至少一个加热层; 并且将加热器层成形为锥形，使得加热器层的上表面的横截面宽度大于与相变材料层接触的加热器层的底表面的横截面宽度。
-
公开(公告)号：US20090289242A1
公开(公告)日：2009-11-26
申请号：US12511602
申请日：2009-07-29
IPC分类号： H01L47/00
CPC分类号： H01L45/1675 , H01L45/06 , H01L45/1233 , H01L45/126 , H01L45/144
摘要： An embodiment of the present invention includes a method of forming a nonvolatile phase change memory (PCM) cell. This method includes forming at least one bottom electrode; forming at least one phase change material layer on at least a portion of an upper surface of the bottom electrode; forming at least one heater layer on at least a portion of an upper surface of the phase change material layer; and shaping the heater layer into a tapered shape, such that an upper surface of the heater layer has a cross-sectional width that is longer than a cross-sectional width of a bottom surface of the heater layer contacting the phase change material layer.Another embodiment of the present invention includes a phase change memory (PCM) structure configurable for use as a nonvolatile storage element. The element includes at least one bottom electrode; at least one phase change material layer on at least a portion of an upper surface of the bottom electrode; and at least one heater layer on at least a portion of an upper surface of the phase change material layer, wherein the heater layer has a tapered shape such that an upper surface of the heater layer has a cross-sectional width that is longer than a cross-sectional width of a bottom surface of the heater layer contacting the phase change material layer.
摘要翻译： 本发明的实施例包括形成非易失性相变存储器（PCM）单元的方法。 该方法包括形成至少一个底部电极; 在所述底部电极的上表面的至少一部分上形成至少一个相变材料层; 在所述相变材料层的上表面的至少一部分上形成至少一个加热层; 并且将加热器层成形为锥形，使得加热器层的上表面的横截面宽度大于与相变材料层接触的加热器层的底表面的横截面宽度。 本发明的另一实施例包括可配置为用作非易失性存储元件的相变存储器（PCM）结构。 该元件包括至少一个底部电极; 在所述底部电极的上表面的至少一部分上的至少一个相变材料层; 以及在所述相变材料层的上表面的至少一部分上的至少一个加热层，其中所述加热器层具有锥形形状，使得所述加热器层的上表面的横截面宽度比 加热器层的底表面的与相变材料层接触的横截面宽度。
-
公开(公告)号：US07910911B2
公开(公告)日：2011-03-22
申请号：US12511602
申请日：2009-07-29
IPC分类号： H01L47/00
CPC分类号： H01L45/1675 , H01L45/06 , H01L45/1233 , H01L45/126 , H01L45/144
摘要： An embodiment of the present invention includes a phase change memory (PCM) structure configurable for use as a nonvolatile storage element. The element includes at least one bottom electrode; at least one phase change material layer on at least a portion of an upper surface of the bottom electrode; and at least one heater layer on at least a portion of an upper surface of the phase change material layer, wherein the heater layer has a tapered shape such that an upper surface of the heater layer has a cross-sectional width that is longer than a cross-sectional width of a bottom surface of the heater layer contacting the phase change material layer.
摘要翻译： 本发明的实施例包括可配置为用作非易失性存储元件的相变存储器（PCM）结构。 该元件包括至少一个底部电极; 在所述底部电极的上表面的至少一部分上的至少一个相变材料层; 以及在所述相变材料层的上表面的至少一部分上的至少一个加热层，其中所述加热器层具有锥形形状，使得所述加热器层的上表面的横截面宽度比 加热器层的底表面的与相变材料层接触的横截面宽度。
-
5.发明授权Method for forming a self-aligned bit line for PCRAM and self-aligned etch back process 有权用于形成PCRAM和自对准回蚀工艺的自对准位线的方法公开(公告)号：US08273598B2
公开(公告)日：2012-09-25
申请号：US13020051
申请日：2011-02-03
申请人： Matthew J. Breitwisch , Chieh-Fang Chen , Shih-Hung Chen , Eric A. Joseph , Chung Hon Lam , Michael F. Lofaro , Hsiang-Lan Lung , Alejandro G. Schrott , Min Yang
发明人： Matthew J. Breitwisch , Chieh-Fang Chen , Shih-Hung Chen , Eric A. Joseph , Chung Hon Lam , Michael F. Lofaro , Hsiang-Lan Lung , Alejandro G. Schrott , Min Yang
IPC分类号： H01L21/00
CPC分类号： H01L45/06 , H01L45/144 , H01L45/1608 , H01L45/1683
摘要： A method of forming bit line aligned to a phase change material that includes forming a pedestal of a sacrificial material on a portion of a lower electrode and forming at least one dielectric material adjacent to the sacrificial material, wherein the at least one dielectric material has an upper surface substantially coplanar with an upper surface of the pedestal of the sacrificial material. The pedestal of the sacrificial material is removed selective to the at least one dielectric material and the lower electrode to provide an opening to an exposed surface of the lower electrode. A phase change material is formed on the exposed surface of the lower electrode, and the opening is filled with a conductive fill material. A self-aligned etch back process is also provided.
摘要翻译： 一种形成与相变材料对准的位线的方法，包括在下电极的一部分上形成牺牲材料的基座并且形成与所述牺牲材料相邻的至少一个电介质材料，其中所述至少一种电介质材料具有 上表面与牺牲材料的基座的上表面基本共面。 牺牲材料的基座被选择性地移除到至少一个电介质材料和下电极以提供到下电极的暴露表面的开口。 在下电极的暴露表面上形成相变材料，并且用导电填充材料填充开口。 还提供了自对准的回蚀工艺。
-
6.发明授权Method for forming a self-aligned bit line for PCRAM and self-aligned etch back process 失效用于形成PCRAM和自对准回蚀工艺的自对准位线的方法公开(公告)号：US08445313B2
公开(公告)日：2013-05-21
申请号：US13546684
申请日：2012-07-11
申请人： Matthew J. Breitwisch , Chieh-Fang Chen , Shih-Hung Chen , Eric A. Joseph , Chung Hon Lam , Michael F. Lofaro , Hsiang-Lan Lung , Alejandro G. Schrott , Min Yang
发明人： Matthew J. Breitwisch , Chieh-Fang Chen , Shih-Hung Chen , Eric A. Joseph , Chung Hon Lam , Michael F. Lofaro , Hsiang-Lan Lung , Alejandro G. Schrott , Min Yang
IPC分类号： H01L21/00
CPC分类号： H01L45/06 , H01L45/144 , H01L45/1608 , H01L45/1683
摘要： A method of forming bit line aligned to a phase change material that includes forming a pedestal of a sacrificial material on a portion of a lower electrode and forming at least one dielectric material adjacent to the sacrificial material, wherein the at least one dielectric material has an upper surface substantially coplanar with an upper surface of the pedestal of the sacrificial material. The pedestal of the sacrificial material is removed selective to the at least one dielectric material and the lower electrode to provide an opening to an exposed surface of the lower electrode. A phase change material is formed on the exposed surface of the lower electrode, and the opening is filled with a conductive fill material. A self-aligned etch back process is also provided.
摘要翻译： 一种形成与相变材料对准的位线的方法，包括在下电极的一部分上形成牺牲材料的基座并且形成与所述牺牲材料相邻的至少一个电介质材料，其中所述至少一种电介质材料具有 上表面与牺牲材料的基座的上表面基本共面。 牺牲材料的基座被选择性地移除到至少一个电介质材料和下电极以提供到下电极的暴露表面的开口。 在下电极的暴露表面上形成相变材料，并且用导电填充材料填充开口。 还提供了自对准的回蚀工艺。
-
公开(公告)号：US20120280197A1
公开(公告)日：2012-11-08
申请号：US13550091
申请日：2012-07-16
IPC分类号： H01L45/00
CPC分类号： H01L45/148 , H01L27/2436 , H01L45/06 , H01L45/1233 , H01L45/141 , H01L45/143 , H01L45/144 , H01L45/16 , H01L45/1683
摘要： A phase change memory cell having a flat lower bottom electrode and a method for fabricating the same. The method includes forming a dielectric layer over a substrate including an array of conductive contacts, patterning, a via having a low aspect ratio such that a depth of the via is less than a width thereof, to a contact surface of the substrate corresponding to each of the array of conductive contacts to be connected to access circuitry, etching the dielectric layer and depositing electrode material over the etched dielectric layer and within each via, and planarizing the electrode material to form a plurality of lower bottom electrodes on each of the conductive contacts.
摘要翻译： 一种具有平底下电极的相变存储单元及其制造方法。 该方法包括在包括导电触点阵列的基板上形成电介质层，图案化，具有低纵横比以使得通孔的深度小于其宽度的通孔到对应于每个的基板的接触表面 导电触头的阵列阵列连接到存取电路，蚀刻电介质层并在蚀刻后的介电层上和每个通孔内沉积电极材料，并平面化电极材料，以在每个导电触头上形成多个下部底部电极 。
-
8.发明申请METHOD FOR FORMING A SELF-ALIGNED BIT LINE FOR PCRAM AND SELF-ALIGNED ETCH BACK PROCESS 有权用于形成用于PCRAM和自对准回退过程的自对准位线的方法公开(公告)号：US20120202333A1
公开(公告)日：2012-08-09
申请号：US13020051
申请日：2011-02-03
申请人： Matthew J. Breitwisch , Chieh-Fang Chen , Shih-Hung Chen , Eric A. Joseph , Chung Hon Lam , Michael F. Lofaro , Hsiang-Lan Lung , Alejandro G. Schrott , Min Yang
发明人： Matthew J. Breitwisch , Chieh-Fang Chen , Shih-Hung Chen , Eric A. Joseph , Chung Hon Lam , Michael F. Lofaro , Hsiang-Lan Lung , Alejandro G. Schrott , Min Yang
IPC分类号： H01L21/02
CPC分类号： H01L45/06 , H01L45/144 , H01L45/1608 , H01L45/1683
摘要： A method of forming bit line aligned to a phase change material that includes forming a pedestal of a sacrificial material on a portion of a lower electrode and fowling at least one dielectric material adjacent to the sacrificial material, wherein the at least one dielectric material has an upper surface substantially coplanar with an upper surface of the pedestal of the sacrificial material. The pedestal of the sacrificial material is removed selective to the at least one dielectric material and the lower electrode to provide an opening to an exposed surface of the lower electrode. A phase change material is formed on the exposed surface of the lower electrode, and the opening is filled with a conductive fill material. A self-aligned etch back process is also provided.
摘要翻译： 一种形成与相变材料对准的位线的方法，其包括在下电极的一部分上形成牺牲材料的基座并且与邻近所述牺牲材料的至少一个电介质材料相连，其中所述至少一种电介质材料具有 上表面与牺牲材料的基座的上表面基本共面。 牺牲材料的基座被选择性地移除到至少一个电介质材料和下电极以提供到下电极的暴露表面的开口。 在下电极的暴露表面上形成相变材料，并且用导电填充材料填充开口。 还提供了自对准的回蚀工艺。
-
公开(公告)号：US08471236B2
公开(公告)日：2013-06-25
申请号：US13550091
申请日：2012-07-16
IPC分类号： H01L29/40
CPC分类号： H01L45/148 , H01L27/2436 , H01L45/06 , H01L45/1233 , H01L45/141 , H01L45/143 , H01L45/144 , H01L45/16 , H01L45/1683
摘要： A phase change memory cell having a flat lower bottom electrode and a method for fabricating the same. The method includes forming a dielectric layer over a substrate including an array of conductive contacts, patterning, a via having a low aspect ratio such that a depth of the via is less than a width thereof, to a contact surface of the substrate corresponding to each of the array of conductive contacts to be connected to access circuitry, etching the dielectric layer and depositing electrode material over the etched dielectric layer and within each via, and planarizing the electrode material to form a plurality of lower bottom electrodes on each of the conductive contacts.
摘要翻译： 一种具有平底下电极的相变存储单元及其制造方法。 该方法包括在包括导电触点阵列的基板上形成电介质层，图案化，具有低纵横比以使得通孔的深度小于其宽度的通孔到对应于每个的基板的接触表面 导电触头的阵列阵列连接到存取电路，蚀刻电介质层并在蚀刻后的介电层上和每个通孔内沉积电极材料，并平面化电极材料，以在每个导电触头上形成多个下部底部电极 。
-
公开(公告)号：US08283650B2
公开(公告)日：2012-10-09
申请号：US12550048
申请日：2009-08-28
IPC分类号： H01L45/00
CPC分类号： H01L45/148 , H01L27/2436 , H01L45/06 , H01L45/1233 , H01L45/141 , H01L45/143 , H01L45/144 , H01L45/16 , H01L45/1683
摘要： A phase change memory cell having a flat lower bottom electrode and a method for fabricating the same. The method includes forming a dielectric layer over a substrate including an array of conductive contacts, patterning, a via having a low aspect ratio such that a depth of the via is less than a width thereof, to a contact surface of the substrate corresponding to each of the array of conductive contacts to be connected to access circuitry, etching the dielectric layer and depositing electrode material over the etched dielectric layer and within each via, and planarizing the electrode material to form a plurality of lower bottom electrodes on each of the conductive contacts.
摘要翻译： 一种具有平底下电极的相变存储单元及其制造方法。 该方法包括在包括导电触点阵列的基板上形成电介质层，图案化，具有低纵横比以使得通孔的深度小于其宽度的通孔到对应于每个的基板的接触表面 导电触头的阵列阵列连接到存取电路，蚀刻电介质层并在蚀刻后的介电层上和每个通孔内沉积电极材料，并平面化电极材料，以在每个导电触头上形成多个下部底部电极 。
-
-
-
-
-
-
-
-
-
搜索结果
76 条记录 (耗时 0.028 秒)