INTEGRATED DEVICE
    41.
    发明申请
    INTEGRATED DEVICE 审中-公开
    集成设备

    公开(公告)号:US20090288700A1

    公开(公告)日:2009-11-26

    申请号:US12373931

    申请日:2007-08-06

    IPC分类号: H01L31/048 H01L31/00

    CPC分类号: H01M10/465 H02S40/38

    摘要: The present invention relates to an integrated device (10) comprising at least one inorganic photovoltaic cell (16), a substrate supporting the at least one inorganic photovoltaic cell, a prefabricated thin battery (34) coupled to the at least one inorganic photovoltaic cell, and an encapsulation for sealing the integrated device, wherein one of the substrate and the encapsulation is formed by the prefabricated thin battery. The present invention also relates to a method for the manufacturing of such a integrated device.

    摘要翻译: 本发明涉及包括至少一个无机光伏电池(16),支撑所述至少一个无机光伏电池的衬底,耦合到所述至少一个无机光伏电池的预制薄电池(34)的集成器件(10) 以及用于密封集成器件的封装,其中衬底和封装中的一个由预制的薄电池形成。 本发明还涉及这种集成装置的制造方法。

    Co-planar thin film transistor having additional source/drain insulation layer
    43.
    发明申请
    Co-planar thin film transistor having additional source/drain insulation layer 审中-公开
    具有附加源极/漏极绝缘层的共平面薄膜晶体管

    公开(公告)号:US20070187688A1

    公开(公告)日:2007-08-16

    申请号:US11568460

    申请日:2005-04-26

    IPC分类号: H01L29/04

    CPC分类号: H01L29/78618 H01L29/66606

    摘要: A co-planar thin film transistor, TFT (22), and a method of fabricating the same, in which an additional insulating layer is provided on the source contact (30) and the drain contact (32) and defined such that a first region (34) of the additional insulating layer occupies substantially the same area as the source contact (30) and a second region (36) of the additional insulating layer occupies substantially the same area as the drain contact (32). This tends to provide a reduction in the gate (62) to source capacitance, and the gate (62) to drain capacitance. In some geometries this can be achieved without any additional masks or defining steps.

    摘要翻译: 一种共平面薄膜晶体管TFT(22)及其制造方法,其中在源极触点(30)和漏极触点(32)上设置附加的绝缘层,并且被定义为使得第一区域 所述附加绝缘层的所述第一区域(34)占据与所述源极接触件(30)大致相同的面积,并且所述附加绝缘层的第二区域(36)占据与所述漏极接触件(32)基本相同的面积。 这倾向于提供栅极(62)到源极电容的减小,以及栅极(62)降低漏极电容。 在一些几何形状中,这可以在没有任何附加掩模或限定步骤的情况下实现。

    Active matrix pixel drive circuit for oled display
    44.
    发明申请
    Active matrix pixel drive circuit for oled display 有权
    有源矩阵像素驱动电路,用于oled显示

    公开(公告)号:US20060132051A1

    公开(公告)日:2006-06-22

    申请号:US10559054

    申请日:2004-05-28

    IPC分类号: G09G3/10

    摘要: A display device has a plurality of pixels, each pixel having a current-driven display element (2) coupled between a first conductive layer (28) and a second conductive layer (27), the second conductive layer (27) being coupled to a current supply (26) via a switchable device (12) having a thin film component (122) on a first area of a substrate (120). Each pixel further has a first capacitive device having a first capacitor plate (132) on a second area of the substrate (120), the first capacitor plate (120) being conductively coupled to the thin film component, a second capacitor plate (133) and a first insulating layer (130) between the first capacitor plate (132) and the second capacitor plate (133). Stacked on top of the first capacitive device is a second capacitive device sharing the second capacitor plate (133) with the first capacitive device, the second capacitive device further comprising a third capacitor plate comprising at least a part of the second conductive layer (27), and a second insulating layer (140) between the second capacitor plate and the third capacitor plate. This arrangement benefits from larger capacitances for the first capacitive device and the second capacitive device, making them more robust against the influences of parasitic capacitances.

    摘要翻译: 显示装置具有多个像素,每个像素具有耦合在第一导电层(28)和第二导电层(27)之间的电流驱动显示元件(2),所述第二导电层(27)耦合到 通过在基板(120)的第一区域上具有薄膜部件(122)的可切换装置(12)提供电流供应(26)。 每个像素还具有第一电容器件,其具有在衬底(120)的第二区域上的第一电容器板(132),第一电容器板(120)导电耦合到薄膜部件,第二电容器板(133) 以及在第一电容器板(132)和第二电容器板(133)之间的第一绝缘层(130)。 堆叠在第一电容性器件的顶部的是第二电容器件,其与第一电容器件共享第二电容器板(133),第二电容器件还包括第三电容器板,该第三电容器板包括第二导电层(27)的至少一部分, ,以及在第二电容器板和第三电容器板之间的第二绝缘层(140)。 这种安排受益于第一电容性器件和第二电容器件的较大电容,使得它们相对于寄生电容的影响更坚固。

    Manufacture of shaped structures in lcd cells, and masks therefor
    45.
    发明申请
    Manufacture of shaped structures in lcd cells, and masks therefor 审中-公开
    在lcd细胞中制造成形结构,并对其进行掩模

    公开(公告)号:US20060119932A1

    公开(公告)日:2006-06-08

    申请号:US10537951

    申请日:2003-11-28

    IPC分类号: G06K7/10

    摘要: A method of forming shaped structures in liquid crystal display cells, comprises applying a photosensitive layer (6) to a transistor plate (2), and forming the shaped structures on the photosensitive layer in a photolithographic process using a grey-tone photo mask (7, 21). This mask comprises at least one region of semi-transparent material (8, 16, 18), the degree of transparency of which is dependent on the optical band gap of the material.

    摘要翻译: 一种在液晶显示单元中形成成形结构的方法,包括将感光层(6)施加到晶体管板(2)上,并且在使用灰色光掩模(7)的光刻工艺中在感光层上形成成形结构 ,21)。 该掩模包括半透明材料(8,16,18)的至少一个区域,其透明度取决于材料的光学带隙。

    Tft electronic devices and their manufacture
    46.
    发明申请
    Tft electronic devices and their manufacture 审中-公开
    Tft电子设备及其制造

    公开(公告)号:US20060049428A1

    公开(公告)日:2006-03-09

    申请号:US10520229

    申请日:2002-06-25

    IPC分类号: H01L29/76 H01L29/745

    摘要: An electronic device (70) comprises a thin film transistor (TFT) (9,59), the TFT including a channel (16) defined in a layer of polycrystalline semiconductor material (10,48). The polycrystalline semiconductor material is produced by crystallising amorphous semiconductor material (2) using metal atoms (6) to promote the crystallisation process. The polycrystalline semiconductor material (10) includes an average concentration of metal atoms in the range 1.3×1018 to 7.5×1018 atoms/cm3. This enables polycrystalline semiconductor TFTs to be formed with leakage properties acceptable for use in active matrix displays using a metal induced crystallisation process of duration significantly less that previously thought necessary. Furthermore, this process duration reduction facilitates the reliable fabrication of poly-Si TFTs having bottom gates formed of metal.

    摘要翻译: 电子器件(70)包括薄膜晶体管(TFT)(9,59),TFT包括限定在多晶半导体材料层(10,48)中的沟道(16)。 通过使用金属原子(6)使非晶半导体材料(2)结晶以促进结晶过程来生产多晶半导体材料。 多晶半导体材料(10)包括在1.3×10 18至7.5×10 18原子/ cm 3之间的金属原子的平均浓度。 这使得多晶半导体TFT可以形成为可用于有源矩阵显示器中的泄漏特性,其使用的金属诱导结晶过程的持续时间明显少于以前认为必要的时间。 此外,该工艺持续时间缩短有助于可靠地制造具有由金属形成的底部栅极的多晶硅TFT。