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公开(公告)号：US20220123987A1
公开(公告)日：2022-04-21
申请号：US17076190
申请日：2020-10-21
Applicant: QUALCOMM Incorporated
Inventor： Lalan Jee Mishra , Richard Dominic Wietfeldt , George Alan Wiley , Radu Pitigoi-Aron
Abstract: Pulse amplitude modulation (PAM) encoding for a communication bus is disclosed. In particular, various two-wire communication buses may encode bits using three-level PAM (PAM-3) or five-level PAM (PAM-5) to increase bit transmission without requiring increases to clock frequencies or adding additional pins. Avoiding increases in clock frequencies helps reduce the risk of electromagnetic interference (EMI), and avoiding use of extra pins avoids cost increases for integrated circuits (ICs).
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42.发明授权公开(公告)号：US10515044B2
公开(公告)日：2019-12-24
申请号：US16142419
申请日：2018-09-26
Applicant: QUALCOMM Incorporated
Inventor： Richard Dominic Wietfeldt , Radu Pitigoi-Aron , Lalan Jee Mishra
Abstract: Systems, methods, and apparatus for communication virtualized general-purpose input/output (GPIO) signals over a serial communication link. An apparatus includes a serial bus, and an originating device and destination device coupled to the serial bus. The originating device may be configured to generate a first virtual GPIO packet that carries a payload representative of signaling state of physical GPIO in the originating device, generate a second virtual GPIO packet that carries a payload representative of an event generated by a processor in the originating device, and transmit the first and second virtual GPIO packets on the serial bus. The destination device may be configured to receive the second virtual GPIO packet from the serial bus, and communicate the event to a processor of the destination device or modify signaling state of physical GPIO in the destination device in accordance with the payload of the second virtual GPIO packet.
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公开(公告)号：US10482057B2
公开(公告)日：2019-11-19
申请号：US15942385
申请日：2018-03-30
Applicant: QUALCOMM Incorporated
Inventor： Radu Pitigoi-Aron , Richard Dominic Wietfeldt , Douglas Wayne Hoffman
IPC: G06F13/42
Abstract: Systems, methods and apparatus are described that offer improved performance of a sensor bus. A first command is transmitted to devices coupled to a serial bus operated in a first mode in accordance with a first protocol to cause the serial bus to be operated in a second mode. After communicating in accordance with a second protocol while the serial bus is operated in the second mode, a second command is transmitted to the plurality of devices in accordance with the first protocol to terminate the second mode. In the second mode, extra symbols inserted into a sequence of symbols transmitted on the serial bus prevent the occurrence of an unintended signaling state on the serial bus. Pulses transmitted on a wire of the serial bus in the second mode may have their duration limited such that a filter of a second device suppresses the limited-duration pulses.
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公开(公告)号：US10452603B2
公开(公告)日：2019-10-22
申请号：US15895856
申请日：2018-02-13
Applicant: QUALCOMM Incorporated
Inventor： Radu Pitigoi-Aron , Richard Dominic Wietfeldt , Douglas Wayne Hoffman
IPC: G06F13/42
Abstract: Systems, methods and apparatus are described that offer improved performance of a sensor bus. A first command is transmitted to devices coupled to a serial bus operated in a first mode in accordance with a first protocol to cause the serial bus to be operated in a second mode. After communicating in accordance with a second protocol while the serial bus is operated in the second mode, a second command is transmitted to the plurality of devices in accordance with the first protocol to terminate the second mode. In the second mode, extra symbols inserted into a sequence of symbols transmitted on the serial bus prevent the occurrence of an unintended signaling state on the serial bus. Pulses transmitted on a wire of the serial bus in the second mode may have their duration limited such that a filter of a second device suppresses the limited-duration pulses.
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公开(公告)号：US10241955B2
公开(公告)日：2019-03-26
申请号：US15660752
申请日：2017-10-03
Applicant: QUALCOMM Incorporated
Inventor： Radu Pitigoi-Aron , Richard Dominic Wietfeldt
IPC: G06F13/00 , G06F13/42 , G06F13/364 , G06F13/40
Abstract: A device is provided that has a bus including a first line and a second line. A first set of devices are coupled to the bus and, in a first mode of operation, configured to use the first line for data transmissions and use the second line for a first clock signal. One or more additional lines are connected between two or more of the devices in the first set of devices for transmitting signaling between the two or more devices. A second set of devices are configured to use the bus and at least one of the additional lines for data transmissions in a second mode of operation, where in the second mode of operation symbols are encoded across the first line, the second line, and the at least one of the additional lines.
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Patent Agency Ranking
公开(公告)号：US10108511B2
公开(公告)日：2018-10-23
申请号：US15179470
申请日：2016-06-10
Applicant: QUALCOMM Incorporated
Inventor： Radu Pitigoi-Aron
IPC: G06F11/22 , G06F13/42 , G06F13/364 , G06F13/40 , G06F1/08 , G06F11/263
Abstract: System, methods and apparatus are described that offer improved performance of an Inter-Integrated Circuit (I2C) bus. A method of testing a spike filter in a legacy I2C device includes generating a command to be transmitted on a serial bus in accordance with an I2C protocol, where the command includes an address corresponding to the legacy slave device, merging the command with a sequence of pulses to obtain a test signal, transmitting the test signal on the serial bus, and determining the efficacy of a spike filter in the first slave device based on whether the legacy slave device acknowledges the test signal. Each pulse in the sequence of pulses has a duration that is less than 50 ns. The spike filter is expected to suppress pulses that have a duration of less than 50 ns.
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公开(公告)号：US09996483B2
公开(公告)日：2018-06-12
申请号：US15092554
申请日：2016-04-06
Applicant: QUALCOMM Incorporated
Inventor： Radu Pitigoi-Aron
CPC classification number: G06F13/102 , G06F13/20 , G06F13/385 , G06F13/4068 , G06F13/4295
Abstract: System, methods and apparatus are described that facilitate a device to encode/decode data in a data communications interface coupled to a plurality of wires. The device determines a value of a sequence of data bits allocated to a frame, converts the value into a sequence of symbols associated with the frame, and transmits the sequence of symbols to a receiver. The device performs the converting by calculating base-N coefficients of a base-N number polynomial for the frame based on the value, where N is greater than 2, calculating base-2 coefficients of a base-2 number polynomial for each symbol according to a respective base-N coefficient corresponding to each symbol, determining changes of states of the plurality of wires for each symbol according to the base-2 coefficients respectively calculated for each symbol, and generating the sequence of symbols based on the changes of states of the plurality of wires for each symbol.
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公开(公告)号：US09990330B2
公开(公告)日：2018-06-05
申请号：US14925612
申请日：2015-10-28
Applicant: QUALCOMM Incorporated
Inventor： Radu Pitigoi-Aron , Justin Black
IPC: G06F13/00 , G06F13/42 , G06F13/364 , H04L25/49
CPC classification number: G06F13/4291 , G06F13/364 , G06F13/4282 , H04L25/4923
Abstract: A device is provided comprising a shared bus including a first and a second line, a first subset of devices and a second subset of devices coupled to the shared bus. The first subset of devices may be configured to operate according to a first protocol mode. The second subset of devices may be configured to operate according to a second protocol mode, wherein the second protocol mode is distinct from the first protocol mode. A first device within the first subset of devices may include a receiver circuit adapted to adjust a signal transition occurring on the first line while the second line is in a first logical state so that the signal transition instead occurs when the second line is in a second logical state. The signal transition is adjusted only if it occurs within a threshold amount of time from a second transition on the second line.
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公开(公告)号：US09921998B2
公开(公告)日：2018-03-20
申请号：US15676741
申请日：2017-08-14
Applicant: QUALCOMM Incorporated
Inventor： Radu Pitigoi-Aron , Richard Dominic Wietfeldt , Douglas Wayne Hoffman
IPC: G06F13/42
CPC classification number: G06F13/4295 , G06F13/4291 , G06F2213/0016 , Y02D10/14 , Y02D10/151
Abstract: Systems, methods and apparatus are described that offer improved performance of a sensor bus. A first command is transmitted to devices coupled to a serial bus operated in a first mode in accordance with a first protocol to cause the serial bus to be operated in a second mode. After communicating in accordance with a second protocol while the serial bus is operated in the second mode, a second command is transmitted to the plurality of devices in accordance with the first protocol to terminate the second mode. In the second mode, extra symbols inserted into a sequence of symbols transmitted on the serial bus prevent the occurrence of an unintended signaling state on the serial bus. Pulses transmitted on a wire of the serial bus in the second mode may have their duration limited such that a filter of a second device suppresses the limited-duration pulses.
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公开(公告)号：US20180046595A1
公开(公告)日：2018-02-15
申请号：US15660752
申请日：2017-10-03
Applicant: QUALCOMM Incorporated
Inventor： Radu Pitigoi-Aron , Richard Dominic Wietfeldt
IPC: G06F13/42 , G06F13/364 , G06F13/40
CPC classification number: G06F13/4291 , G06F13/364 , G06F13/4022 , G06F13/4295
Abstract: A device is provided that has a bus including a first line and a second line. A first set of devices are coupled to the bus and, in a first mode of operation, configured to use the first line for data transmissions and use the second line for a first clock signal. One or more additional lines are connected between two or more of the devices in the first set of devices for transmitting signaling between the two or more devices. A second set of devices are configured to use the bus and at least one of the additional lines for data transmissions in a second mode of operation, where in the second mode of operation symbols are encoded across the first line, the second line, and the at least one of the additional lines.
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