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公开(公告)号:US20240146005A1
公开(公告)日:2024-05-02
申请号:US18050852
申请日:2022-10-28
Applicant: QUALCOMM Incorporated
Inventor: Adi Menachem , Lalan Jee Mishra , Amit Gil
CPC classification number: H01R24/20 , H01R24/60 , H01R2107/00
Abstract: Systems and methods for dynamic lane reallocation based on bandwidth needs are disclosed. In one aspect, dynamic repurposing of low-speed lanes for creation of a high-speed lane on a communication bus is disclosed. The repurposed low-speed lanes may be used to support a symmetrical high-speed link or an asymmetrical high-speed link. Further changes are provided to shield conductors in a cable to assist in preventing crosstalk or unwanted electromagnetic emissions. The addition of such a dynamic high-speed lane may assist in data transfer for data intensive use cases.
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公开(公告)号:US11515676B2
公开(公告)日:2022-11-29
申请号:US16798238
申请日:2020-02-21
Applicant: QUALCOMM INCORPORATED
Inventor: Lalan Jee Mishra , Richard Dominic Wietfeldt , James Lionel Panian , Georgios Konstantinos Paparrizos
IPC: H01B7/42 , H01R13/533 , H01R13/66 , H01R24/28 , H01R25/00
Abstract: Thermal mitigation features may be included in a Universal Serial Bus (USB) cable assembly or in the USB receptacle portion of a device. In one aspect, one or both ends of a USB cable jacket may have greater thermal conductivity than the portion between them. The portion having the greater thermal conductivity may dissipate excess heat from the cable into the environment. In another aspect, a USB cable connector or the USB receptacle portion of a device may include a thermoelectric heat pump. The thermoelectric heat pump may move excess heat from the cable assembly or receptacle into a portion of the cable assembly or device that dissipates the heat into the environment.
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公开(公告)号:US11509130B2
公开(公告)日:2022-11-22
申请号:US17172870
申请日:2021-02-10
Applicant: QUALCOMM INCORPORATED
Inventor: Lalan Jee Mishra , Richard Dominic Wietfeldt , Georgios Konstantinos Paparrizos , Joshua Warner
Abstract: Power delivery may be controlled to help prevent arcing when a data cable supplying power from a power source device to a power sink device is disconnected. The presence of a user in proximity to a connection between a cable plug and a cable receptacle may be detected. The level of a power signal being conveyed from the power source to the power sink may be reduced in response to the detection.
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公开(公告)号:US11356314B2
公开(公告)日:2022-06-07
申请号:US17076190
申请日:2020-10-21
Applicant: QUALCOMM Incorporated
Inventor: Lalan Jee Mishra , Richard Dominic Wietfeldt , George Alan Wiley , Radu Pitigoi-Aron
Abstract: Pulse amplitude modulation (PAM) encoding for a communication bus is disclosed. In particular, various two-wire communication buses may encode bits using three-level PAM (PAM-3) or five-level PAM (PAM-5) to increase bit transmission without requiring increases to clock frequencies or adding additional pins. Avoiding increases in clock frequencies helps reduce the risk of electromagnetic interference (EMI), and avoiding use of extra pins avoids cost increases for integrated circuits (ICs).
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公开(公告)号:US20220156220A1
公开(公告)日:2022-05-19
申请号:US16952229
申请日:2020-11-19
Applicant: QUALCOMM Incorporated
IPC: G06F13/42
Abstract: Alternate sideband signaling in a Peripheral Component Interconnect (PCI) express (PCIE) link may be enabled over existing sideband lines in a conventional PCIE link. For example, the default sideband communication of PCIE may be changed to a Universal Asynchronous receiver/transmitter (UART), line multiplex UART (LM-UART), serial peripheral interface (SPI), I2C, or I3C mode of communication. This change may be negotiated between the host and slave of the communication link, with a transition occurring after the negotiation concludes. The new mode of communication may include or encode the conventional PCIE sideband signals.
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公开(公告)号:US11256637B2
公开(公告)日:2022-02-22
申请号:US16829163
申请日:2020-03-25
Applicant: QUALCOMM Incorporated
Inventor: Lalan Jee Mishra , Richard Dominic Wietfeldt
Abstract: Systems, methods, and apparatus increase the number of slave devices that can be connected to a serial bus. The bus protocol may be an RFFE protocol, an SPMI protocol, an I3C protocol or another protocol usable on a serial bus. In various aspects of the disclosure, a method performed at a device coupled to a serial bus includes receiving a first datagram at a slave device coupled to a serial bus, where the first datagram includes a 4-bit broadcast address indicative of a broadcast datagram, a first command directed to an invalid register address, and a payload, determining an encapsulation protocol associated with the invalid register address, and responding to a second command carried in the payload when an 8-bit slave address in the payload matches an 8-bit slave identifier allocated to the slave device.
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47.
公开(公告)号:US20210242903A1
公开(公告)日:2021-08-05
申请号:US16780509
申请日:2020-02-03
Applicant: QUALCOMM Incorporated
Inventor: Lalan Jee Mishra , Richard Dominic Wietfeldt , Soon-Seng Lau
Abstract: Crosstalk amelioration systems and methods in a radio frequency front end (RFFE) communication system provide a host or master of an RFFE bus to monitor a weakly-driven data line in the RFFE bus while a clock line is actively providing a clock signal for trigger events at one or more slaves on the RFFE bus. If the host detects noise on the data line that looks like a sequence start condition (SSC) signal, the host further signals on the data line to negate the impact of the false SSC signal and thus avoid misinterpretation by the slaves.
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公开(公告)号:US11023408B2
公开(公告)日:2021-06-01
申请号:US16405637
申请日:2019-05-07
Applicant: QUALCOMM Incorporated
IPC: G06F13/42
Abstract: Systems, methods, and apparatus for communication over a serial bus in accordance with an I3C protocol are described that enable a slave device to request that a bus master device terminate a write transaction with the slave device. The serial bus may be operated according to an I3C single data rate protocol. In various aspects of the disclosure, a method performed at a master device coupled to a serial bus includes initiating a write transaction between the master device and a slave device, where the write transaction includes a plurality of data frames, and at least one data frame is configured with a transition bit in place of a parity bit. The method may include terminating the write transaction when the slave device drives a data line of the serial bus while receiving the transition bit.
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公开(公告)号:US10733121B2
公开(公告)日:2020-08-04
申请号:US16392264
申请日:2019-04-23
Applicant: QUALCOMM Incorporated
Inventor: Lalan Jee Mishra , Radu Pitigoi-Aron , Richard Dominic Wietfeldt , Sharon Graif , Lior Amarilio , Kishalay Haldar , Oren Nishry
Abstract: Systems, methods, and apparatus for communicating virtual GPIO information generated at multiple source devices and directed to multiple destination devices. A method performed at a device coupled to a serial bus includes generating first virtual GPIO state information representative of state of one or more physical GPIO output pins, asserting a request to transmit the first virtual GPIO state information by driving a data line of the serial bus from a first state to a second state after a start code has been transmitted on a serial bus and before a first clock pulse is transmitted on a clock line of the serial bus, transmitting the first virtual GPIO state information as a first set of bits in a data frame associated with the start code, and receiving second virtual GPIO state information in a second set of bits in the data frame.
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公开(公告)号:US10572410B2
公开(公告)日:2020-02-25
申请号:US16193853
申请日:2018-11-16
Applicant: QUALCOMM Incorporated
Inventor: Helena Deirdre O'Shea , Lalan Jee Mishra , Richard Dominic Wietfeldt , Mohit Kishore Prasad , Amit Gil , Gary Chang
Abstract: Systems, methods, and apparatus are described that provide for communicating coexistence messages over a multi-drop serial bus. A data communication method includes configuring a common memory map at each of a plurality of devices coupled to a serial bus, receiving at a first device coupled to the serial bus, first coexistence information directed to a second device coupled to the serial bus, generating at the first device, a coexistence message that includes the first coexistence information, and transmitting the coexistence message to the second device over the serial bus. The first coexistence information in the coexistence message may be addressed to a location in the common memory map calculated based on a destination address associated with the first coexistence information and a unique identifier of the first device.
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