公开(公告)号：US20140149649A1

公开(公告)日：2014-05-29

申请号：US14169847

申请日：2014-01-31

Applicant: SK hynix memory solutions inc.

Inventor： Rajiv Agarwal ,  Marcus Marrow

IPC: G06F12/02

CPC classification number: G06F12/0246 ,  G11C16/3459 ,  G11C16/349 ,  G11C16/3495 ,  G11C29/82

Abstract: For each of a plurality of locations in flash memory, a number of pulses required to change a value stored in that location is obtained. From the plurality of locations, a location to write to is selected using the obtained number of pulses. The selected location is written to.

Abstract translation: 对于闪速存储器中的多个位置中的每一个，获得改变存储在该位置的值所需的脉冲数。 从多个位置，使用获得的脉冲数选择要写入的位置。 所选位置被写入。

公开(公告)号：US20140129899A1

公开(公告)日：2014-05-08

申请号：US14061600

申请日：2013-10-23

Applicant: SK hynix memory solutions inc.

Inventor： Naveen Kumar ,  Zheng Wu ,  Jason Bellorado ,  Lingqi Zeng ,  Marcus Marrow

IPC: H03M13/27

CPC classification number: H03M13/2918 ,  H03M13/2927 ,  H03M13/2963 ,  H03M13/2966

Abstract: Decoding associated with a second error correction code and a first error correction code is performed. Ns first and second-corrected segments of data, first sets of parity information, and second sets of parity information are intersegment interleaved to obtain intersegment interleaved data, where the Ns segments of data, the Ns first sets of parity information, and the Ns second sets of parity information have had decoding associated with the first and the second error correction code performed on them (Ns is the number of segments interleaved together). Decoding associated with a third error correction code is performed on the intersegment interleaved data and interleaved parity information to obtain at least third-corrected interleaved data. The third-corrected interleaved data is de-interleaved.

Abstract translation: 执行与第二纠错码和第一纠错码相关联的解码。 Ns个第一和第二校正的数据段，第一组奇偶校验信息和第二组奇偶校验信息被进行交插，以获得段间交织数据，其中Ns个数据段，N个第一组奇偶校验信息和Ns秒 奇偶校验信息组具有与对它们执行的第一和第二纠错码相关联的解码（Ns是交织在一起的段数）。 对段间交错数据和交错奇偶校验信息执行与第三纠错码相关联的解码，以获得至少第三校正交错数据。 第三校正的交错数据被解交织。

公开(公告)号：US20140040706A1

公开(公告)日：2014-02-06

申请号：US13963824

申请日：2013-08-09

Applicant: SK hynix memory solutions inc.

Inventor： Zheng Wu ,  Jason Bellorado ,  Marcus Marrow

IPC: H04L1/00

CPC classification number: H04L1/0041 ,  G06F11/00 ,  H03G3/3052 ,  H03M13/1102 ,  H03M13/1515 ,  H03M13/3715 ,  H04L1/20

Abstract: An analog front end is adjusted by determining a signal quality based at least in part on digital sample(s). If the signal quality satisfies one or more criteria, a data independent gain gradient and a data independent offset gradient are selected to adjust the analog front end, where the two gradients are generated without taking into consideration an instantaneous value of an expected signal. If the signal quality does not satisfy the criteria, a decision directed gain gradient and a decision directed offset gradient are selected to adjust the analog front end, where the two gradients are generated based at least in part on decision(s).

Abstract translation: 通过至少部分地基于数字样本确定信号质量来调整模拟前端。 如果信号质量满足一个或多个标准，则选择数据独立增益梯度和数据独立偏移梯度来调整模拟前端，其中在不考虑预期信号的瞬时值的情况下生成两个梯度。 如果信号质量不满足标准，则选择决策导向增益梯度和决策导向偏移梯度来调整模拟前端，其中至少部分地基于决策生成两个梯度。

公开(公告)号：US08621293B2

公开(公告)日：2013-12-31

申请号：US13864161

申请日：2013-04-16

Applicant: SK hynix memory solutions inc.

Inventor： Marcus Marrow ,  Jason Bellorado ,  Rajiv Agarwal

IPC: G11C29/00 ,  H03M13/00

CPC classification number: G06F12/0246 ,  G06F12/00 ,  G06F12/08 ,  G11C11/5642 ,  G11C16/26 ,  G11C29/026 ,  G11C29/028

Abstract: A value read back from storage and a set of bins are received. Each bin in the set of bins has a bin range. A bin corresponding to the read-back value is selected from the set of bins. The bin range of the selected bin is adjusted, based at least in part on the read-back value, so that the read-back value is more centered within the selected bin after adjustment.

Abstract translation: 收到从存储器读取的值和一组垃圾箱。 一组垃圾箱中的每个垃圾桶都有一个垃圾箱范围。 从该组合箱中选择对应于回读值的仓。 至少部分地基于回读值来调整所选择的仓的仓范围，使得在调整后回读值在所选仓内更加居中。

公开(公告)号：US20130318286A1

公开(公告)日：2013-11-28

申请号：US13869863

申请日：2013-04-24

Applicant: SK hynix memory solutions inc.

Inventor： Rajiv Agarwal ,  Marcus Marrow

IPC: G06F12/02

CPC classification number: G06F12/0246 ,  G11C16/3459 ,  G11C16/349 ,  G11C16/3495 ,  G11C29/82

Abstract: A number of pulses to modify information stored in a given location in a plurality of locations is obtained for each of the plurality of locations in flash memory. A location having the largest number of pulses is selecting from the plurality of locations. The selected location is written to.

Abstract translation: 针对闪速存储器中的多个位置中的每一个获得多个脉冲来修改存储在多个位置中的给定位置的信息。 具有最大脉冲数的位置是从多个位置进行选择。 所选位置被写入。