公开(公告)号：US20200174206A1

公开(公告)日：2020-06-04

申请号：US16701355

申请日：2019-12-03

Applicant: STMicroelectronics (Grenoble 2) SAS

Inventor： Florian PERMINJAT ,  Romain COFFY ,  Jean-Michel RIVIERE

IPC: G02B6/43 ,  H05K1/02

Abstract: A carrier substrate includes a first network of electrical connections and recess. An electronic chip is mounted to the carrier substrate within the recess. The electronic chip includes an integrated guide of optical waves and a second network of electrical connections. A end section of an elongate optical cable is mounted on one side of the electronic chip with a longitudinal guide of optical waves optically coupled to the integrated guide of optical waves. Electrical connection elements are interposed between a face of the electronic chip and a bottom wall of the recess, such that first connect pads of the first electrical connection network are connected to second connect pads of the second electrical connection network through the electrical connection elements.

公开(公告)号：US20190190606A1

公开(公告)日：2019-06-20

申请号：US16218948

申请日：2018-12-13

Applicant: STMICROELECTRONICS (GRENOBLE 2) SAS

Inventor： Jean-Michel RIVIERE ,  Romain COFFY ,  Karine SAXOD

IPC: H04B10/40 ,  H04B10/80 ,  H05K5/03 ,  H05K7/02

CPC classification number: H04B10/40 ,  H01L31/0203 ,  H01L31/162 ,  H04B10/80 ,  H05K5/03 ,  H05K7/02

Abstract: A cover for an electronic circuit package, including: a body having an opening extending therethrough; a first element located in the opening and having a surface continuing planar or rounded shapes of a surface of the cover; and a second element of connection of the first element to the body.

公开(公告)号：US20190189859A1

公开(公告)日：2019-06-20

申请号：US16218906

申请日：2018-12-13

Applicant: STMICROELECTRONICS (GRENOBLE 2) SAS

Inventor： Jean-Michel RIVIERE ,  Romain COFFY ,  Karine SAXOD

IPC: H01L33/48 ,  H01L33/00 ,  H01L33/58 ,  H01L31/18 ,  H01L31/12 ,  H01L31/0232 ,  H01L31/0203 ,  H05K5/03

CPC classification number: H01L33/483 ,  H01L31/0203 ,  H01L31/02327 ,  H01L31/12 ,  H01L31/162 ,  H01L31/18 ,  H01L33/005 ,  H01L33/58 ,  H05K5/03

Abstract: A cover for an electronic circuit package, including an element having peripheral portions housed in an inner groove of a through opening.