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41.发明申请公开(公告)号：US20080310078A1
公开(公告)日：2008-12-18
申请号：US12155805
申请日：2008-06-10
申请人： Byoung Hwa Lee , Sung Kwon Wi , Hae Suk Chung , Dong Seok Park , Sang Soo Park , Min Cheol Park
发明人： Byoung Hwa Lee , Sung Kwon Wi , Hae Suk Chung , Dong Seok Park , Sang Soo Park , Min Cheol Park
IPC分类号： H01G4/232
摘要： Disclosed is a method of implementing controlled equivalent series resistance (ESR) having low equivalent series inductance (ESL) of a multi-layer chip capacitor which includes a plurality of internal electrodes each having first polarity or second polarity which is opposite to the first polarity, and dielectric layers each disposed between the internal electrodes of the first polarity and the second polarity, wherein the internal electrodes having the first polarity and the internal electrodes having the second polarity are alternated at least once to form one or more blocks being stacked.
摘要翻译： 公开了一种实现具有低等效串联电感（ESL）的受控等效串联电阻（ESR）的方法，该多层片式电容器包括多个内部电极，每个内部电极具有与第一极性相反的第一极性或第二极性， 以及介电层，其各自设置在第一极性和第二极性的内部电极之间，其中具有第一极性的内部电极和具有第二极性的内部电极至少交替一次以形成一个或多个堆叠的块。
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公开(公告)号：US07292430B2
公开(公告)日：2007-11-06
申请号：US11272877
申请日：2005-11-15
申请人： Byoung Hwa Lee , Chang Hoon Shim , Kyong Nam Hwang , Dong Seok Park , Sang Soo Park , Min Cheol Park
发明人： Byoung Hwa Lee , Chang Hoon Shim , Kyong Nam Hwang , Dong Seok Park , Sang Soo Park , Min Cheol Park
IPC分类号： H01G4/228
摘要： A multi-layer chip capacitor includes a capacitor body; first and second internal electrodes alternately arranged therein and separated by dielectric layers, each of the internal electrodes having at least one opening formed at one or more sides thereof; first and second conductive vias passing through the openings and electrically connected to the first and second internal electrodes, respectively; first and second terminal electrodes of opposite polarities formed on one or more side faces of the capacitor body; and first and second lowermost electrode patterns being coplanar, each pattern including a via contact portion and a lead portion extending therefrom. The first and second lowermost electrode patterns are connected to the first and second terminal electrodes, respectively, through the respective lead portions of the lowermost patterns.
摘要翻译： 多层片式电容器包括电容器体; 第一和第二内部电极交替地布置在其中并由电介质层分离，每个内部电极具有形成在其一侧或多侧的至少一个开口; 第一和第二导电通孔分别穿过开口并电连接到第一和第二内部电极; 形成在电容器主体的一个或多个侧面上的相反极性的第一和第二端子电极; 并且第一和第二最低电极图案是共面的，每个图案包括通孔接触部分和从其延伸的引线部分。 第一和第二最下面的电极图案分别通过最下面图案的相应引线部分连接到第一和第二端子电极。
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公开(公告)号：US07046500B2
公开(公告)日：2006-05-16
申请号：US11068757
申请日：2005-03-02
申请人： Byoung Hwa Lee , Dong Seok Park , Min Cheol Park , Sang Soo Park , Chang Hoon Shim , Kyung Nam Hwang
发明人： Byoung Hwa Lee , Dong Seok Park , Min Cheol Park , Sang Soo Park , Chang Hoon Shim , Kyung Nam Hwang
摘要： A laminated ceramic capacitor includes a ceramic block formed by laminating a plurality of ceramic sheets, a plurality of external electrodes formed on outer surfaces of the ceramic block facing each other, and set as a positive terminal and a negative terminal, respectively, one or more first and second internal electrodes alternately arranged within the ceramic block such that electric currents flow in opposite directions in the internal electrodes, and a plurality of withdrawing patterns for connecting the first and second internal electrodes to the external electrodes, respectively.
摘要翻译： 层叠陶瓷电容器包括通过层叠多个陶瓷片而形成的陶瓷块，形成在彼此相对的陶瓷块的外表面上的多个外部电极，分别设置为正极端子和负极端子，一个或多个 第一和第二内部电极交替地布置在陶瓷块内，使得电流在内部电极中沿相反方向流动，以及多个用于将第一和第二内部电极连接到外部电极的抽出图案。
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公开(公告)号：US06940710B1
公开(公告)日：2005-09-06
申请号：US11029677
申请日：2005-01-06
摘要： A multilayered chip capacitor including a capacitor main body including a plurality of dielectric layers, which are laminated; at least one pair of first and second internal electrodes, each of which is formed on the corresponding one of the plural dielectric layers and includes at least one lead extended to one end of the corresponding dielectric layer; a plurality of external terminals formed on the outer surface of the capacitor main body, and respectively connected to the first and second internal electrodes through the leads; and at least one opened region, formed through the inner area of each of the first and second internal electrodes, for branching the flow of current so as to increase the offset quantity of parasitic inductances between the first and second internal electrodes.
摘要翻译： 一种多层片状电容器，其包括层叠有多个电介质层的电容器主体; 至少一对第一和第二内部电极，每个所述第一和第二内部电极形成在所述多个电介质层中的相应一个上，并且包括至少一个延伸到所述相应电介质层的一端的引线; 多个外部端子，形成在电容器主体的外表面上，分别通过引线连接到第一和第二内部电极; 以及通过第一和第二内部电极的每一个的内部区域形成的至少一个开放区域，用于分流电流，以增加第一和第二内部电极之间的寄生电感的偏移量。
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公开(公告)号：US08351180B1
公开(公告)日：2013-01-08
申请号：US13531237
申请日：2012-06-22
IPC分类号： H01G4/06
摘要： There is provided a multilayer ceramic capacitor, including: a multilayer body in which a plurality of dielectric layers are stacked in a thickness direction; and inner electrode layers formed within the multilayer body and including first and second inner electrodes disposed to be opposed to each other; wherein a ratio (MA1/CA1) of MA1 to CA1 is between 0.07 and 0.20, wherein CA1 represents an area of the multilayer body in a cross section of the multilayer body taken in a length and thickness direction, and MA1 represents an area of a first margin part in the cross section of the multilayer body taken in the length and thickness direction, the first margin part being a portion of the multilayer body, other than a first capacitance forming part thereof in which the first and second inner electrodes overlap in the thickness direction.
摘要翻译： 提供了一种多层陶瓷电容器，包括：多层体，其中多个电介质层在厚度方向上堆叠; 以及形成在所述多层体内并且包括彼此相对设置的第一和第二内部电极的内部电极层; 其中MA1与CA1的比率（MA1 / CA1）在0.07和0.20之间，其中CA1表示在长度和厚度方向上取下的多层体的横截面中的多层体的面积，MA1表示 第一边缘部分是沿着长度和厚度方向截取的第一边缘部分，第一边缘部分是多层体的一部分，除了第一电容形成部分之外，第一和第二内部电极在其中重叠 厚度方向。
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公开(公告)号：US07817007B2
公开(公告)日：2010-10-19
申请号：US12194935
申请日：2008-08-20
申请人： Byoung Hwa Lee , Sung Kwon Wi , Hyeog Soo Shin , Dong Seok Park , Sang Soo Park , Min Cheol Park
发明人： Byoung Hwa Lee , Sung Kwon Wi , Hyeog Soo Shin , Dong Seok Park , Sang Soo Park , Min Cheol Park
IPC分类号： H01F5/00
CPC分类号： H01F17/0013 , H01F3/14 , H01F17/04
摘要： There is provided a laminated inductor including: a body where a plurality of magnetic layers are laminated; a coil part formed on the magnetic layers, the coil part including a plurality of conductor patterns and a plurality of conductive vias; first and second external electrodes formed on an outer surface of the body to connect to both ends of the coil part, respectively; and a non-magnetic conductor formed on at least one of the magnetic layers so as to relax magnetic saturation caused by direct current flowing through the coil part. The laminated inductor employs the non-magnetic conductor as a non-magnetic gap to be simplified in a manufacturing process and effectively improved in DC superposition characteristics.
摘要翻译： 提供一种层叠电感器，包括：层叠有多个磁性层的主体; 形成在所述磁性层上的线圈部分，所述线圈部分包括多个导体图案和多个导电通孔; 第一外部电极和第二外部电极分别形成在主体的外表面上以连接到线圈部分的两端; 以及形成在至少一个磁性层上的非磁性导体，以便缓和由直流电流流过线圈部分的磁饱和。 层叠电感器在制造工艺中使用非磁性导体作为非磁性间隙进行简化，并有效地改善了DC叠加特性。
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公开(公告)号：US07183872B2
公开(公告)日：2007-02-27
申请号：US11065232
申请日：2005-02-24
申请人： Byoung Hwa Lee , Dong Seok Park , Min Cheol Park , Sang Soo Park
发明人： Byoung Hwa Lee , Dong Seok Park , Min Cheol Park , Sang Soo Park
CPC分类号： H01P5/10
摘要： A laminated balun transformer subminiaturized with a transmission line length reduced below λ/4 without any variation of characteristics. The laminated balun transformer includes a first strip line having one end inputted to a unbalanced signal; a second strip line having connected to the first strip line; a third strip line formed in parallel with the first strip line and connected to a ground and connected to the external electrode for a first balanced signal; a fourth strip line formed in parallel with the second strip line and connected to the external electrode for a ground and the external electrode for a second balanced signal; and a capacitance forming electrode formed in parallel with a portion of the opened end of the second strip line and connected to the external electrode for the unbalanced signal.
摘要翻译： 传输线长度小于λ/ 4的小型化的不平衡 - 不平衡转换变压器，没有任何特性变化。 叠层平衡不平衡变压器包括：一端输入不平衡信号的第一带状线; 连接到第一带状线的第二带状线; 第三带状线，与第一带状线平行地形成并连接到接地并连接到外部电极用于第一平衡信号; 第四带状线，与第二条带线平行地形成并连接到用于接地的外部电极和用于第二平衡信号的外部电极; 以及电容形成电极，其与所述第二带状线的开放端部的一部分平行地形成，并且与所述不平衡信号的外部电极连接。
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48.发明申请MOUNTING STRUCTURE OF CIRCUIT BOARD HAVING MULTI-LAYERED CERAMIC CAPACITOR THEREON 有权具有多层陶瓷电容器的电路板的安装结构公开(公告)号：US20130050894A1
公开(公告)日：2013-02-28
申请号：US13590270
申请日：2012-08-21
摘要： Disclosed herein is a mounting structure of a circuit board having a multi-layered ceramic capacitor thereon, the multi-layered ceramic capacitor including dielectric sheets laminated thereon and external terminal electrodes formed at both ends thereof, the dielectric sheets having internal electrodes formed thereon, and the external terminal electrodes being connected in parallel with the internal electrode, wherein the internal electrodes are disposed to be in parallel with the circuit board, the external terminal electrodes are bonded to lands of the circuit board by a conductive material, and a bonding height (Ts) of the conductive material is lower than a sum of a gap (Ta) between the circuit board and a bottom surface of the multi-layered ceramic capacitor and a thickness (Tc) of a cover layer on a lower portion of the multi-layered ceramic capacitor, whereby vibration noise can be greatly reduced.
摘要翻译： 这里公开了一种其上具有多层陶瓷电容器的电路板的安装结构，其中层叠有电介质片的多层陶瓷电容器和形成在其两端的外部端子电极，其上形成有内部电极的电介质片，以及 外部端子电极与内部电极并联连接，其中内部电极被设置为与电路板平行，外部端子电极通过导电材料接合到电路板的焊盘，并且接合高度 Ts）低于多层陶瓷电容器的电路板和底面之间的间隙（Ta）和多层陶瓷电容器的下表面的覆盖层的厚度（Tc）之和， 层状陶瓷电容器，从而可以大大降低振动噪声。
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公开(公告)号：US20120327556A1
公开(公告)日：2012-12-27
申请号：US13531237
申请日：2012-06-22
IPC分类号： H01G4/12
摘要： There is provided a multilayer ceramic capacitor, including: a multilayer body in which a plurality of dielectric layers are stacked in a thickness direction; and inner electrode layers formed within the multilayer body and including first and second inner electrodes disposed to be opposed to each other; wherein a ratio (MA1/CA1) of MA1 to CA1 is between 0.07 and 0.20, wherein CA1 represents an area of the multilayer body in a cross section of the multilayer body taken in a length and thickness direction, and MA1 represents an area of a first margin part in the cross section of the multilayer body taken in the length and thickness direction, the first margin part being a portion of the multilayer body, other than a first capacitance forming part thereof in which the first and second inner electrodes overlap in the thickness direction.
摘要翻译： 提供了一种多层陶瓷电容器，包括：多层体，其中多个电介质层在厚度方向上堆叠; 以及形成在所述多层体内并且包括彼此相对设置的第一和第二内部电极的内部电极层; 其中MA1与CA1的比率（MA1 / CA1）在0.07和0.20之间，其中CA1表示在长度和厚度方向上取下的多层体的横截面中的多层体的面积，MA1表示 第一边缘部分是沿着长度和厚度方向截取的第一边缘部分，第一边缘部分是多层体的一部分，除了第一电容形成部分之外，第一和第二内部电极在其中重叠 厚度方向。
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公开(公告)号：US08054607B2
公开(公告)日：2011-11-08
申请号：US12649071
申请日：2009-12-29
IPC分类号： H01G4/005
摘要： There are provided a multilayer chip capacitor and a circuit board device. The multilayer chip capacitor includes a capacitor body including a plurality of dielectric layers that are stacked, first and second outer electrodes formed on an outer surface of the capacitor body and having opposite polarity, first and second inner electrodes opposing each other, interleaved with the dielectric layers in the capacitor body, and each including an electrode plate forming capacitance and a lead extending from the electrode plate, the lead of the first inner electrode and the lead of the second electrode being respectively connected to the first and second outer electrodes, and third inner electrodes interposed between the first and second inner electrodes. At least one of the third inner electrodes adjacent to the first inner electrode includes a conductive pattern having the same shape as the lead of the first inner electrode and is connected to the first outer electrode. At least one of the third inner electrodes adjacent to the second inner electrode includes a conductive pattern having the same shape as the lead of the second inner electrode and is connected to the second outer electrode.
摘要翻译： 提供了多层片状电容器和电路板装置。 多层片状电容器包括电容器本体，其包括层叠的多个电介质层，形成在电容器本体的外表面上并具有相反极性的第一和第二外部电极，彼此相对的第一和第二内部电极，与电介质 层，并且每个包括电极板形成电容和从电极板延伸的引线，第一内部电极的引线和第二电极的引线分别连接到第一和第二外部电极，第三 介于第一和第二内部电极之间的内部电极。 与第一内部电极相邻的第三内部电极中的至少一个包括具有与第一内部电极的引线相同形状并且连接到第一外部电极的导电图案。 与第二内部电极相邻的第三内部电极中的至少一个包括具有与第二内部电极的引线相同形状并且连接到第二外部电极的导电图案。
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