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    Multilayer ceramic capacitor
    2.
    发明授权
    Multilayer ceramic capacitor 有权
    多层陶瓷电容器

    公开(公告)号：US08351180B1

    公开(公告)日：2013-01-08

    申请号：US13531237

    申请日：2012-06-22

    申请人： Young Ghyu Ahn ,  Byoung Hwa Lee ,  Min Cheol Park ,  Sang Soo Park ,  Dong Seok Park

    发明人： Young Ghyu Ahn ,  Byoung Hwa Lee ,  Min Cheol Park ,  Sang Soo Park ,  Dong Seok Park

    IPC分类号： H01G4/06

    CPC分类号： H01G4/12 ,  H01G4/012 ,  H01G4/30

    摘要： There is provided a multilayer ceramic capacitor, including: a multilayer body in which a plurality of dielectric layers are stacked in a thickness direction; and inner electrode layers formed within the multilayer body and including first and second inner electrodes disposed to be opposed to each other; wherein a ratio (MA1/CA1) of MA1 to CA1 is between 0.07 and 0.20, wherein CA1 represents an area of the multilayer body in a cross section of the multilayer body taken in a length and thickness direction, and MA1 represents an area of a first margin part in the cross section of the multilayer body taken in the length and thickness direction, the first margin part being a portion of the multilayer body, other than a first capacitance forming part thereof in which the first and second inner electrodes overlap in the thickness direction.

    摘要翻译： 提供了一种多层陶瓷电容器，包括：多层体，其中多个电介质层在厚度方向上堆叠; 以及形成在所述多层体内并且包括彼此相对设置的第一和第二内部电极的内部电极层; 其中MA1与CA1的比率（MA1 / CA1）在0.07和0.20之间，其中CA1表示在长度和厚度方向上取下的多层体的横截面中的多层体的面积，MA1表示 第一边缘部分是沿着长度和厚度方向截取的第一边缘部分，第一边缘部分是多层体的一部分，除了第一电容形成部分之外，第一和第二内部电极在其中重叠 厚度方向。

    CHIP TYPE LAMINATED CAPACITOR
    3.
    发明申请
    CHIP TYPE LAMINATED CAPACITOR 有权
    芯片型层压电容器

    公开(公告)号：US20120327555A1

    公开(公告)日：2012-12-27

    申请号：US13529766

    申请日：2012-06-21

    申请人： Young Ghyu AHN ,  Byoung Hwa Lee ,  Min Cheol Park ,  Young Hoon Song ,  Mi Hee Lee

    发明人： Young Ghyu AHN ,  Byoung Hwa Lee ,  Min Cheol Park ,  Young Hoon Song ,  Mi Hee Lee

    IPC分类号： H01G4/12

    CPC分类号： H01G4/01 ,  H01G4/12 ,  H01G4/232 ,  H01G4/30

    摘要： There is provided a chip type laminated capacitor, including: a ceramic body including a dielectric layer having a thickness equal to 10 or more times an average particle diameter of a grain included therein and being 3 □m or less; first and second outer electrodes formed on both ends of the ceramic body in a length direction; first and second band parts formed to extend inwardly of the ceramic body in the length direction on a length-width (L-W) plane from the first and second outer electrodes and having different lengths; and third and fourth band parts formed to extend inwardly of the ceramic body in the length direction on a length-thickness (L-T) plane from the first and second outer electrodes and having different lengths.

    摘要翻译： 提供了一种片式叠层电容器，其包括：陶瓷体，其包括厚度等于其中包含的晶粒的平均粒径的10倍以上且为3μm以下的电介质层; 第一外电极和第二外电极，其在长度方向上形成在陶瓷体的两端; 第一和第二带部分形成为在第一和第二外部电极的长度（L-W）平面上沿长度方向在陶瓷体的内部延伸并具有不同的长度; 以及第三和第四带部分，其形成为在长度方向上在距第一和第二外部电极的长度 - 厚度（L-T）平面上延伸到陶瓷体的内侧并具有不同的长度。

    COUPLING STRUCTURE FOR MULTI-LAYERED CHIP FILTER, AND MULTI-LAYERED CHIP FILTER WITH THE STRUCTURE
    4.
    发明申请
    COUPLING STRUCTURE FOR MULTI-LAYERED CHIP FILTER, AND MULTI-LAYERED CHIP FILTER WITH THE STRUCTURE 有权
    多层芯片滤波器的耦合结构和结构的多层芯片滤波器

    公开(公告)号：US20120092090A1

    公开(公告)日：2012-04-19

    申请号：US13109647

    申请日：2011-05-17

    申请人： Young Ghyu AHN ,  Dong Seok PARK ,  Sang Soo PARK ,  Sung Jin PARK ,  Young Sun PARK ,  Bong Sup LIM

    发明人： Young Ghyu AHN ,  Dong Seok PARK ,  Sang Soo PARK ,  Sung Jin PARK ,  Young Sun PARK ,  Bong Sup LIM

    IPC分类号： H01P1/203

    CPC分类号： H01P1/20345 ,  H01P5/02

    摘要： Disclosed herein are a coupling structure for a multi-layered chip filter capable of overcoming a limitation of an existing coupling by improving a coupling structure and a multi-layered chip filter with the structure.The coupling structure according to an exemplary embodiment of the present invention includes: at least two overlap portion patterns each overlapped with a pattern formed on a resonator layer stacked therewith to form at least two overlap areas spaced from each other; and a connecting portion pattern formed by connecting at least three linear lines having a predetermined length to each other to connect the at least two overlap portion patterns to each other.

    摘要翻译： 这里公开了一种用于通过改进耦合结构来克服现有耦合的限制的多层芯片滤波器的耦合结构和具有该结构的多层芯片滤波器。 根据本发明的示例性实施例的耦合结构包括：至少两个重叠部分图案，每个重叠部分图案与形成在其上堆叠的谐振器层上的图案重叠以形成彼此间隔开的至少两个重叠区域; 以及通过将具有预定长度的至少三条线性线彼此连接而形成的连接部分图案，以将至少两个重叠部分图案彼此连接。

    Multi-layered ceramic capacitor
    8.
    发明授权
    Multi-layered ceramic capacitor 有权
    多层陶瓷电容

    公开(公告)号：US08373964B2

    公开(公告)日：2013-02-12

    申请号：US13064153

    申请日：2011-03-08

    申请人： Young Ghyu Ahn ,  Dong Seok Park ,  Sang Soo Park ,  Min Cheol Park ,  Byoung Hwa Lee

    发明人： Young Ghyu Ahn ,  Dong Seok Park ,  Sang Soo Park ,  Min Cheol Park ,  Byoung Hwa Lee

    IPC分类号： H01G4/30 ,  H01G4/06 ,  H01G4/228 ,  H01G4/005

    CPC分类号： H01G4/30 ,  H01G4/005 ,  H01G4/12

    摘要： There is provided a multi-layered ceramic capacitor with reduced internal resistance by forming internal electrode groups including internal electrodes having different lengths. The multi-layered ceramic capacitor of the present invention includes a sintered ceramic body part in which cover layers are provided on both surfaces thereof as an outermost layer and a plurality of ceramic layers are stacked therebetween, first and second external electrodes each formed on an outer surface of the sintered ceramic body part, a plurality of first and second internal electrode groups adjacent to each other in a stacking direction of the plurality of ceramic layers, having the ceramic layer therebetween, and including 2N or 2N+1 (N is an integer number larger than 1) internal electrodes electrically connected to the first and second external electrodes, wherein the 2N or 2N+1 (N is an integer number larger than 1) internal electrodes are disposed to face at least one internal electrode of other adjacent internal electrode groups. A length of each internal electrode has a pyramid shape.

    摘要翻译： 通过形成具有不同长度的内部电极的内部电极组，提供具有降低的内部电阻的多层陶瓷电容器。 本发明的多层陶瓷电容器包括烧结陶瓷体部分，其两面上设有覆盖层作为最外层，并且多个陶瓷层堆叠在其间，第一和第二外部电极各自形成在外部 烧结陶瓷体部的表面，在多个陶瓷层的堆叠方向上彼此相邻的多个第一和第二内部电极组，其间具有陶瓷层，并且包括2N或2N + 1（N是整数 大于1的数字）电连接到第一和第二外部电极的内部电极，其中设置2N或2N + 1（N为大于1的整数）的内部电极，以面对其他相邻内部电极的至少一个内部电极 团体 每个内部电极的长度具有金字塔形状。

    Multi-layered ceramic capacitor
    9.
    发明申请
    Multi-layered ceramic capacitor 有权
    多层陶瓷电容

    公开(公告)号：US20110317327A1

    公开(公告)日：2011-12-29

    申请号：US13064153

    申请日：2011-03-08

    申请人： Young Ghyu Ahn ,  Dong Seok Park ,  Sang Soo Park ,  Min Cheol Park ,  Byoung Hwa Lee

    发明人： Young Ghyu Ahn ,  Dong Seok Park ,  Sang Soo Park ,  Min Cheol Park ,  Byoung Hwa Lee

    IPC分类号： H01G4/30

    CPC分类号： H01G4/30 ,  H01G4/005 ,  H01G4/12

    摘要： There is provided a multi-layered ceramic capacitor with reduced internal resistance by forming internal electrode groups including internal electrodes having different lengths. The multi-layered ceramic capacitor of the present invention includes a sintered ceramic body part in which cover layers are provided on both surfaces thereof as an outermost layer and a plurality of ceramic layers are stacked therebetween, first and second external electrodes each formed on an outer surface of the sintered ceramic body part, a plurality of first and second internal electrode groups adjacent to each other in a stacking direction of the plurality of ceramic layers, having the ceramic layer therebetween, and including 2N or 2N+1 (N is an integer number larger than 1) internal electrodes electrically connected to the first and second external electrodes, wherein the 2N or 2N+1 (N is an integer number larger than 1) internal electrodes are disposed to face at least one internal electrode of other adjacent internal electrode groups. A length of each internal electrode has a pyramid shape.

    摘要翻译： 通过形成具有不同长度的内部电极的内部电极组，提供具有降低的内部电阻的多层陶瓷电容器。 本发明的多层陶瓷电容器包括烧结陶瓷体部分，其两面上设有覆盖层作为最外层，并且多个陶瓷层堆叠在其间，第一和第二外部电极各自形成在外部 烧结陶瓷体部的表面，在多个陶瓷层的堆叠方向上彼此相邻的多个第一和第二内部电极组，其间具有陶瓷层，并且包括2N或2N + 1（N是整数 大于1的数字）电连接到第一和第二外部电极的内部电极，其中设置2N或2N + 1（N为大于1的整数）的内部电极，以面对其他相邻内部电极的至少一个内部电极 团体 每个内部电极的长度具有金字塔形状。

    Filter for removing noise
    10.
    发明授权
    Filter for removing noise 有权
    滤除噪音

    公开(公告)号：US09035723B2

    公开(公告)日：2015-05-19

    申请号：US13420538

    申请日：2012-03-14

    申请人： Yong Suk Kim ,  Young Ghyu Ahn ,  Young Seuck Yoo ,  Jeong Bok Kwak ,  Sang Moon Lee ,  Kang Heon Hur ,  Sung Kwon Wi

    发明人： Yong Suk Kim ,  Young Ghyu Ahn ,  Young Seuck Yoo ,  Jeong Bok Kwak ,  Sang Moon Lee ,  Kang Heon Hur ,  Sung Kwon Wi

    IPC分类号： H03H7/01 ,  H01F27/33 ,  H01F17/00

    CPC分类号： H03H7/01 ,  H01F17/0013 ,  H01F2017/0066 ,  H01F2017/008

    摘要： The present invention discloses a filter for removing noise, which includes: a lower magnetic substrate; a coil layer disposed on the lower magnetic substrate and including at least one conductor pattern and an insulating layer covering the conductor pattern; an upper magnetic substrate disposed on the coil layer; and a magnetic permeability enhancing layer disposed on the magnetic substrate with lower magnetic permeability of the lower magnetic substrate and the upper magnetic substrate.According to the present invention, it is possible to implement a filter for removing noise with high performance, characteristics, and reliability by increasing magnetic permeability to improve impedance characteristics and improving an effect of shielding electromagnetic waves such as jamming.

    摘要翻译： 本发明公开了一种消除噪声的滤波器，包括：下磁性基片; 线圈层，其设置在所述下磁性基板上并且包括至少一个导体图案和覆盖所述导体图案的绝缘层; 设置在所述线圈层上的上磁性基板; 以及设置在所述磁性基板上的磁导率增强层，所述导磁率增强层的下部磁性基板和所述上部磁性基板具有较低的磁导率。 根据本发明，通过增加磁导率以改善阻抗特性并提高屏蔽诸如卡纸的电磁波的效果，可以实现用于去除具有高性能，特性和可靠性的噪声的滤波器。