Ultra-Capacitor Based Energy Storage for Appliances
    41.
    发明申请
    Ultra-Capacitor Based Energy Storage for Appliances 审中-公开
    基于超电容器的电器储能

    公开(公告)号:US20130271092A1

    公开(公告)日:2013-10-17

    申请号:US13992717

    申请日:2011-12-30

    申请人: Shekhar Y. Borkar

    发明人: Shekhar Y. Borkar

    IPC分类号: H02J7/00

    摘要: An ultra-capacitor may replace a rechargeable battery in consumer applications where the appliance usage is not prolonged. That is, if the usage is intermittent, the ultra-capacitor can quickly recharge between consecutive uses. Especially for those applications where an appliance spends most of the time on a charging cradle ultra-capacitor may efficiently replace batteries in appliances.

    摘要翻译: 超级电容器可以在消费者应用中替换可再充电电池,其中电器使用不会延长。 也就是说,如果使用是间歇性的,超级电容器可以在连续使用之间快速充电。 特别是对于家用电器大部分时间用于充电座的应用,超级电容器可以有效地更换电器中的电池。

    Integrated circuit stubs in a point-to-point system
    44.
    发明授权
    Integrated circuit stubs in a point-to-point system 有权
    集成电路存根在点对点系统中

    公开(公告)号:US06747474B2

    公开(公告)日:2004-06-08

    申请号:US09797480

    申请日:2001-02-28

    IPC分类号: H03K1716

    摘要: In some embodiments, the invention involves multiple integrated circuit stubs coupled in series. At least one of the integrated circuit stubs including first conductors to receive signals from a first adjacent one of the integrated circuit stubs, second conductors to provide signals to a second adjacent one of the integrated circuit stubs, and third conductors to provide signals to an integrated circuit chip. The integrated circuit stubs include first drivers and second drivers coupled to the first, second, and third conductors, wherein the first drivers receive the external signals from the first conductors and drive them onto the second conductors and the second drivers receive signals from the first conductors and drive them onto the third conductors.

    摘要翻译: 在一些实施例中,本发明涉及串联耦合的多个集成电路短截线。 所述集成电路短截线中的至少一个包括用于接收来自所述集成电路短截线中的第一相邻一个的信号的第一导体,用于向所述集成电路短截线中的第二相邻组件提供信号的第二导体以及向集成电路短截线提供信号的第三导体 电路芯片。 集成电路短截线包括耦合到第一,第二和第三导体的第一驱动器和第二驱动器,其中第一驱动器接收来自第一导体的外部信号并将它们驱动到第二导体上,并且第二驱动器从第一导体接收信号 并将它们驱动到第三导体上。

    OBJECT-AWARE STORAGE
    47.
    发明申请
    OBJECT-AWARE STORAGE 审中-公开
    对象存储

    公开(公告)号:US20130282992A1

    公开(公告)日:2013-10-24

    申请号:US13976582

    申请日:2011-12-22

    IPC分类号: G06F3/06

    摘要: A storage unit may have an associated processor and storage controller. The storage controller associated with the storage unit may store a mapping of objects (i.e., data) to blocks in the storage unit. This mapping may be received from another source, such as a file system, database, or software application, among other possibilities. The processor associated with the storage unit may execute operation s on the objects stored in the storage unit.

    摘要翻译: 存储单元可以具有相关联的处理器和存储控制器。 与存储单元相关联的存储控制器可以存储对象(即,数据)到存储单元中的块的映射。 该映射可以从其他来源(诸如文件系统,数据库或软件应用程序)等接收,以及其他可能性。 与存储单元相关联的处理器可以对存储在存储单元中的对象执行操作。

    Ultra-Capacitor Based Energy Storage in a Battery Form Factor
    48.
    发明申请
    Ultra-Capacitor Based Energy Storage in a Battery Form Factor 有权
    基于超电容器的电池存储形式

    公开(公告)号:US20130271091A1

    公开(公告)日:2013-10-17

    申请号:US13992627

    申请日:2011-12-28

    申请人: Shekhar Y. Borkar

    发明人: Shekhar Y. Borkar

    IPC分类号: H02J7/00

    摘要: An ultra-capacitor based energy source may replace rechargeable and conventional batteries. It may have the form factor of a conventional battery and may emulate the discharge characteristics of the replaced battery.

    摘要翻译: 基于超电容器的能源可以替代可再充电和常规电池。 它可以具有常规电池的形状因子,并且可以模拟替换的电池的放电特性。

    On-chip observability buffer to observer bus traffic
    50.
    发明授权
    On-chip observability buffer to observer bus traffic 失效
    观察员总线流量的片上可观察性缓冲区

    公开(公告)号:US07171510B2

    公开(公告)日:2007-01-30

    申请号:US09752880

    申请日:2000-12-28

    CPC分类号: G06F11/221

    摘要: The invention provides, in an embodiment, an apparatus, method and means for unintrusively observing, echoing and reading signals transmitted by one of a bus and wireless communication, without disturbing electrical properties of the bus, without adding bus latency, and without adding signal discontinuities. In an aspect, a buffer having a trigger is coupled with a component that connects to a memory bus, the buffer echoes signals to an observability port, and a diagnostic device reads the echoed signals. In an aspect, the bus is one of a simultaneous bi-directional (SBD) bus having ternary logic levels, a single ended bus, a differential bus, an optically coupled bus, a chipset bus, a frontside bus, an input/output (I/O) bus, a peripheral component interface (PCI) bus, and an industry standard architecture (ISA) bus. In an aspect, the buffer echoes bus signals having frequencies between 500 MHz. and 5 GHz. In an aspect, the buffer echoes bus signals having frequencies of at least 5 GHz.

    摘要翻译: 本发明在一个实施例中提供了一种用于非干涉地观察,回送和读取由总线和无线通信之一发送的信号而不干扰总线的电气特性而不增加总线等待时间并且不增加信号不连续性的装置,方法和装置 。 在一方面,具有触发器的缓冲器与连接到存储器总线的部件耦合,缓冲器将信号回送到可观测端口,并且诊断装置读取回送信号。 一方面,总线是具有三元逻辑电平的同时双向(SBD)总线之一,单端总线,差分总线,光耦合总线,芯片组总线,前端总线,输入/输出( I / O)总线,外设组件接口(PCI)总线和工业标准架构(ISA)总线。 在一个方面,缓冲器回波频率在500MHz之间的总线信号。 和5 GHz。 在一方面,缓冲器响应具有至少5GHz频率的总线信号。