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41.发明申请System for fabricating liquid crystal display and method of fabricating liquid crystal display using the same 有权用于制造液晶显示器的系统及使用其制造液晶显示器的方法公开(公告)号：US20050248715A1
公开(公告)日：2005-11-10
申请号：US11095598
申请日：2005-04-01
申请人： Yong Byun , Moo Park , Sung Jung , Sung Kang , Jong Kim , Young Ha , Sang Lee , Sang Park , Hun Choo , Hyug Kweon , Kyung Chae , Hae Son , Sang Shin , Jong Lim
发明人： Yong Byun , Moo Park , Sung Jung , Sung Kang , Jong Kim , Young Ha , Sang Lee , Sang Park , Hun Choo , Hyug Kweon , Kyung Chae , Hae Son , Sang Shin , Jong Lim
IPC分类号： G02F1/13 , G02F1/1333 , G02F1/1335 , G02F1/1337 , G02F1/1339 , G02F1/1341
CPC分类号： G02F1/1303 , G02F1/133351 , G02F1/1339 , G02F1/1341 , G02F2001/133354 , G02F2001/13415
摘要： Disclosed is a system for fabricating a liquid crystal display using liquid crystal dropping and a method of fabricating a liquid crystal display using the same. The present invention includes a liquid crystal forming line dropping liquid crystals on the first substrate, a sealant forming line forming the sealant on the second substrate, and a bonding and hardening line bonding the two substrates to each other and hardening the sealant, printing a sealant, bonding the substrates each other, and hardening the sealant and an inspection process line of cutting the bonded substrates into panel units and grinding and inspecting the unit panels. And, the GAP process line includes And, the present invention includes the processes of dropping LC on a first substrate using a dispenser, forming a main UV hardening sealant on a second substrate, bonding the first and second substrates to each other in a vacuum state, UV-hardening the main UV hardening sealant, cutting the bonded substrates into cell units, grinding the cut substrates, and inspecting the grinded substrates finally.
摘要翻译： 公开了一种使用液晶滴下制造液晶显示器的系统和使用其制造液晶显示器的方法。 本发明包括在第一基板上滴下液晶的液晶形成线，在第二基板上形成密封剂的密封剂形成线，以及将两个基板彼此接合并使密封剂硬化的接合和硬化线，印刷密封剂 ，将基板粘合，使密封剂硬化，将粘接后的基板切割成面板单元的检查处理线，研磨和检查单元面板。 而且，GAP工艺线包括：本发明包括使用分配器在第一衬底上滴加LC的过程，在第二衬底上形成主UV硬化密封剂，在真空状态下将第一和第二衬底彼此接合 UV固化主要的UV硬化密封剂，将粘合的基材切成电池单元，研磨切割的基材，最后检查研磨的基材。
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公开(公告)号：US20050162609A1
公开(公告)日：2005-07-28
申请号：US10815807
申请日：2004-04-02
申请人： Sung Jung
发明人： Sung Jung
摘要： The present invention relates to a fixing structure of a side shield for glasses wherein a side shield installed in glasses legs, comprising a through hole formed in inner upper and lower portions of a rear end of a side shield surrounding the glasses legs, and a fixture having an elastic piece in the interior of the same and a hook part in the upper and lower sides of a front end wherein said fixture is inserted through an opening of the side shield, and the hook part of the fixture is engaged to the though hole, and the elastic piece of the fixture is elastically closely contacted with the glasses legs. In the present invention, the size of the fixture is large, and the hook part of the fixture is inserted into the through hole formed in the side shield. Therefore, anyone can easily insert the fixture for thereby achieving a convenient assembling work, and the side shield is easily fixed to the glasses legs.
摘要翻译： 本发明涉及一种用于玻璃的侧护板的固定结构，其中安装在眼镜腿上的侧护罩包括形成在围绕眼镜腿的侧护罩的后端的内上部和下部的通孔，以及夹具 在其内部具有弹性件，在前端的上侧和下侧具有钩部，其中所述夹具通过侧护罩的开口插入，并且固定件的钩部接合到通孔 并且夹具的弹性片与眼镜腿弹性地紧密接触。 在本发明中，固定装置的尺寸大，固定装置的钩部插入形成在侧罩中的通孔中。 因此，任何人都可以容易地插入夹具，从而实现方便的组装工作，并且侧护罩容易地固定到眼镜腿上。
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公开(公告)号：US20050143979A1
公开(公告)日：2005-06-30
申请号：US11006447
申请日：2004-12-06
申请人： Mi Lee , Do Kim , Jongmo Sung , Hyun Woo Kim , Hong Kang , Sung Jung , Dae Youn , Hong Kim
发明人： Mi Lee , Do Kim , Jongmo Sung , Hyun Woo Kim , Hong Kang , Sung Jung , Dae Youn , Hong Kim
CPC分类号： G10L19/24
摘要： There is provided a speech coding/decoding apparatus and method, in which the input speech signals are classified into several classes in accordance with characteristics of the input speech signals and the input speech signals are coded using frame sizes, quantizer structures, and bit assignment methods corresponding to the determined classes, or in which the frame sizes can be adjusted in accordance with network conditions or codec type of a counter part. Therefore, by optimally adjusting the frame size, the quantizer structure, and the bit assignment method in accordance with the characteristics of input speech, it is possible to improve the performance of the speech coding apparatus, and by adjusting the frame size in accordance with the speech codec type of a counter part, it is also possible to reduce the total end-to-end delay.
摘要翻译： 提供了一种语音编码/解码装置和方法，其中根据输入的语音信号的特性将输入的语音信号分为几类，并且使用帧大小，量化器结构和比特分配方法对输入的语音信号进行编码 对应于所确定的类别，或者可以根据网络条件或计数器部件的编解码器类型来调整帧大小。 因此，通过根据输入语音的特性优化调整帧大小，量化器结构和比特分配方法，可以提高语音编码装置的性能，并且可以通过根据 语音编解码器类型的计数器部件，也可以减少总的端到端延迟。
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44.发明申请Device isolation method of semiconductor memory device and flash memory device fabricating method using the same 有权半导体存储器件的器件隔离方法及其使用的闪存器件制造方法公开(公告)号：US20050142796A1
公开(公告)日：2005-06-30
申请号：US11019352
申请日：2004-12-23
IPC分类号： H01L21/762 , H01L21/8247 , H01L27/115 , H01L21/76
CPC分类号： H01L27/11521 , H01L21/76224 , H01L27/115
摘要： The present invention provides a device isolation method of a semiconductor memory device and flash memory device fabricating method using the same, which can prevent a bridge occurrence between cells. The present invention includes forming a nitride layer pattern defining a trench forming area on a semiconductor substrate, forming a spacer on a sidewall of the nitride layer pattern, forming a trench in the semiconductor layer by removing a portion of the semiconductor layer using the nitride layer pattern and the spacer as an etch mask, forming a device isolation layer filling up the trench, removing the nitride layer pattern and the spacer to complete the device isolation layer, forming a conductor layer over the substrate including the device isolation layer, planarizing the conductor layer and the device isolation layer to lie in a same plane, and forming an insulating layer over the substrate.
摘要翻译： 本发明提供了一种半导体存储器件的器件隔离方法和使用该半导体存储器件的闪存器件制造方法，其可以防止单元之间的桥接发生。 本发明包括在半导体衬底上形成限定沟槽形成区域的氮化物层图案，在氮化物层图案的侧壁上形成间隔物，通过使用氮化物层去除半导体层的一部分，在半导体层中形成沟槽 形成作为蚀刻掩模的间隔物，形成填充沟槽的器件隔离层，去除氮化物层图案和间隔物以完成器件隔离层，在包括器件隔离层的衬底上形成导体层，平坦化导体 层和器件隔离层位于同一平面上，并在衬底上形成绝缘层。
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公开(公告)号：US20050142746A1
公开(公告)日：2005-06-30
申请号：US11019315
申请日：2004-12-23
IPC分类号： H01L21/336 , H01L21/8247 , H01L27/115
CPC分类号： H01L27/11521 , H01L27/115
摘要： The present invention provides a method of fabricating a flash memory device, by which a coupling ratio is raised in a manner of shortening an interval between floating gates using a spacer and by which a bridge generation is avoided between control and floating gates. The present invention includes forming a trench isolation layer defining an active area of a semiconductor substrate, forming a tunnel oxide layer on the active area, forming a first conductor layer for a floating gate over the substrate, forming an insulating layer pattern on the first conductor layer with a prescribed layer having high etch selectivity with the trench isolation layer to expose a portion of the first conductor layer, forming a spacer on a sidewall of the insulating layer pattern, forming a first conductor layer pattern exposing a portion of the trench isolation layer by removing the exposed portion of the first conductor layer using the spacer as an etch mask, removing the insulating layer pattern and the spacer, forming a gate-to-gate insulating layer over the substrate, and forming a second conductor layer on the gate-to-gate insulating layer.
摘要翻译： 本发明提供一种制造闪存器件的方法，通过该方法，以缩短使用间隔物的浮置栅极之间的间隔并且避免在控制栅极和浮置栅极之间避免桥接生成的方式提高耦合比。 本发明包括形成限定半导体衬底的有源区的沟槽隔离层，在有源区上形成隧道氧化层，在衬底上形成浮栅的第一导体层，在第一导体上形成绝缘层图案 层，其具有与所述沟槽隔离层具有高蚀刻选择性的规定层，以暴露所述第一导体层的一部分，在所述绝缘层图案的侧壁上形成间隔物，形成暴露所述沟槽隔离层的一部分的第一导体层图案 通过使用间隔物作为蚀刻掩模去除第一导体层的暴露部分，去除绝缘层图案和间隔物，在衬底上形成栅极 - 栅极绝缘层，并且在栅极 - 栅极上形成第二导体层， 栅极绝缘层。
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公开(公告)号：US20050142744A1
公开(公告)日：2005-06-30
申请号：US11019300
申请日：2004-12-23
IPC分类号： H01L21/762 , H01L21/8247 , H01L27/115 , H01L21/336
CPC分类号： H01L27/11521 , H01L21/76224 , H01L27/115
摘要： The present invention provides a method of fabricating a flash memory device, in which floating gates in neighbor cells are separated from each other without using photolithography, which enhances electrical characteristics of the device, and which facilitates a cell size reduction. The present invention includes forming a mask defining a trench forming area on a semiconductor substrate, forming a trench in the semiconductor layer by removing a portion of the semiconductor layer using the mask, forming a device isolation layer filling up the trench to maintain an effective isolation layer thickness exceeding a predefined thickness, removing the mask, forming a conductor layer over the substrate including the device isolation layer, planarizing the conductor layer and the device isolation layer to lie in a same plane, and forming an insulating layer over the substrate including the conductor patterns.
摘要翻译： 本发明提供一种制造闪存器件的方法，其中相邻单元中的浮置栅极彼此分离而不使用光刻，这增强了器件的电气特性，并且有助于电池尺寸减小。 本发明包括在半导体衬底上形成限定沟槽形成区域的掩模，通过使用掩模去除半导体层的一部分，在半导体层中形成沟槽，形成填充沟槽的器件隔离层以保持有效隔离 层厚度超过预定厚度，去除掩模，在包括器件隔离层的衬底上形成导体层，将导体层和器件隔离层平坦化在同一平面上，并在衬底上形成绝缘层，包括 导体图案。
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公开(公告)号：US20050118921A1
公开(公告)日：2005-06-02
申请号：US10879361
申请日：2004-06-30
申请人： Sung Jung
发明人： Sung Jung
IPC分类号： G02F1/13 , B23K26/00 , B28D5/00 , G02F1/1333 , G02F1/1335 , G02F1/1339 , H01J9/24 , H01J9/00
CPC分类号： G02F1/133351
摘要： A method for cutting a liquid crystal display panel includes providing first and second mother substrates, forming a scribing line on the first and second mother substrates, removing a portion of a seal line being overlapped with the scribing line, the seal line formed on one of the first and second mother substrates, and dividing the first and second mother substrates into a plurality of unit liquid crystal display panels along the scribing line.
摘要翻译： 一种切割液晶显示面板的方法包括：提供第一和第二母基板，在第一和第二母基板上形成刻划线，去除与划线相重叠的一部分密封线， 第一母基板和第二母基板，并且沿着划刻线将第一母基板和第二母基板划分成多个单位液晶显示面板。
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公开(公告)号：US20050078920A1
公开(公告)日：2005-04-14
申请号：US10734146
申请日：2003-12-15
IPC分类号： G02B6/26 , B81B7/02 , G02B6/00 , G02B6/35 , G02B6/36 , G02B6/38 , G02B6/42 , G02B26/08 , H04B10/00 , H04B10/40 , H04B10/50 , H04B10/60
CPC分类号： G02B6/3582 , G02B6/266 , G02B6/3552 , G02B6/3594 , G02B6/36 , G02B6/3887 , G02B6/4248
摘要： The present invention relates to a micro optical communication device package. The package of the invention comprises a Micro-Electro-Mechanical System (MEMS) chip for executing an optical communication function. The MEMS chip is mounted on a base. An upper housing having an opened bottom is placed on the base to form an internal space together with the base. The upper housing is sealed with the base to hermetically seal the MEMS chip within the internal space. The MEMS chip is connected an optical fiber, which is extended through the upper housing to form a light path. A boot is fit around the optical fiber and fixed to the upper housing to seal a portion of the upper housing for allowing passage of the optical fiber.
摘要翻译： 本发明涉及一种微型光通信设备封装。 本发明的封装包括用于执行光通信功能的微机电系统（MEMS）芯片。 MEMS芯片安装在基座上。 具有开口底部的上壳体被放置在基座上以与基部一起形成内部空间。 上壳体与基座密封，以将MEMS芯片密封在内部空间内。 MEMS芯片连接有光纤，该光纤通过上壳体延伸以形成光路。 导光罩装在光纤周围并固定在上壳体上，以密封上壳体的一部分，以允许光纤通过。
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公开(公告)号：US20050074925A1
公开(公告)日：2005-04-07
申请号：US10951503
申请日：2004-09-27
IPC分类号： H01L21/82 , H01L21/8247 , H01L27/115
CPC分类号： H01L27/11521 , H01L27/115
摘要： In order to provide a method for preventing the channel length from being shortened as well as reducing the SAS resistance, the semiconductor device according to the present invention is manufactured by continuously forming linear trench lines on a semiconductor substrate, forming gate oxide lines on the semiconductor substrate between the trench lines, forming gate lines on the trench lines and the gate oxide lines, the gate lines being substantially perpendicular to the trench lines, etching the gate oxide lines and trench lines positioned between the gate lines, forming self aligned sources (SASs) by implanting impurity ions into the etched region, forming spacers on sidewalls of the gate lines, and implanting the impurity ions in the SAS region using the spacers as a mask.
摘要翻译： 为了提供防止通道长度缩短以及降低SAS电阻的方法，根据本发明的半导体器件通过在半导体衬底上连续形成线性沟槽线来制造，在半导体上形成栅极氧化物线 沟槽线之间的衬底，在沟槽线上形成栅极线和栅极氧化物线，栅极线基本上垂直于沟槽线，蚀刻位于栅极线之间的栅极氧化物线和沟槽线，形成自对准源（SAS ），通过将杂质离子注入到蚀刻区域中，在栅极线的侧壁上形成间隔物，并且使用间隔物作为掩模将杂质离子注入到SAS区域中。
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50.发明申请公开(公告)号：US20050057412A1
公开(公告)日：2005-03-17
申请号：US10743459
申请日：2003-12-23
摘要： The present invention is provided to manufacture a slot antenna having slots formed on both sides, that is, a top and a bottom of a dielectric substrate, wherein electric fields in the slots are generated in the utmost same direction. According to this structure, it is possible to realize a compact and lightweight slot antenna having higher gain and radiation efficiency characteristics in comparison with the conventional meandered slot antenna.
摘要翻译： 本发明提供用于制造具有形成在两侧上的槽的缝隙天线，即电介质衬底的顶部和底部，其中槽中的电场在最大相同的方向上产生。 根据该结构，与传统的蜿蜒槽缝天线相比，可以实现具有较高增益和辐射效率特性的紧凑且重量轻的缝隙天线。
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