公开(公告)号：US10145736B2

公开(公告)日：2018-12-04

申请号：US15491729

申请日：2017-04-19

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Hussam Ahmed ,  Jagannathan Venkataraman ,  Sandeep Kesrimal Oswal ,  Hari Babu Tippana ,  Anand Hariraj Udupa

IPC: G01J1/44 ,  H01L31/101 ,  H01L31/107

Abstract: At least some embodiments are directed to a light detection system comprising a photodiode, a transimpedance amplifier (TIA) having a differential output and a differential input coupled across the photodiode, a first bias current source coupled to an anode of the photodiode, and a second bias current source coupled to a cathode of the photodiode. The system also comprises a dynamic control logic coupled to the first and second bias current sources and configured to vary bias currents provided by the first and second bias current sources based on the differential output such that the photodiode is reverse-biased.

公开(公告)号：US10098595B2

公开(公告)日：2018-10-16

申请号：US14871245

申请日：2015-09-30

Applicant: Texas Instruments Incorporated

Inventor： Nagesh Surendranath ,  Rakul Viswanath ,  Sandeep Kesrimal Oswal

IPC: A61B6/03 ,  G01T1/17 ,  G01T1/24 ,  A61B6/00

Abstract: The disclosure provides a circuit that includes a charge sensitive amplifier (CSA) that generates an integrated signal in response to a current signal. An active comparator is coupled to the CSA. The active comparator receives the integrated signal and a primary reference voltage signal, and generates an event detect signal. A first delay element is coupled to the active comparator and provides a fixed delay to the event detect signal to generate a convert signal. A discriminator system is coupled to the CSA. The discriminator system samples the integrated signal when activated by the convert signal.

公开(公告)号：US09461628B2

公开(公告)日：2016-10-04

申请号：US14580388

申请日：2014-12-23

Applicant: Texas Instruments Incorporated

Inventor： Rahul Sharma ,  Nagesh Surendranath ,  Sandeep Kesrimal Oswal

IPC: H03F3/45 ,  H03K3/012 ,  H02M1/08 ,  H02M1/12 ,  H03K17/687 ,  H03H11/12 ,  H03H19/00 ,  G06G7/184 ,  G05F1/56 ,  G06G7/186

CPC classification number: H03K3/012 ,  G05F1/561 ,  G06G7/184 ,  G06G7/186 ,  H02M1/08 ,  H02M1/12 ,  H02M2001/123 ,  H03F3/082 ,  H03H11/1291 ,  H03H19/004 ,  H03K4/023 ,  H03K17/687

Abstract: Charge to voltage conversion integrator circuitry for data acquisition front-end and other applications to provide a single-ended up a voltage using an input bias capacitance and a switching circuit to selectively place an input transistor in a negative feedback configuration in a first mode to charge the input bias capacitance to a calibration voltage for compensating integrator amplifier bias circuitry, with the switching circuit connecting an input node and the input bias capacitance in a second mode to integrate the input current signal across a feedback capacitance to provide a single-ended output voltage with the input bias capacitance maintaining a zero voltage at the input node.

Abstract translation: 充电到电压转换积分电路，用于数据采集前端和其他应用，以提供使用输入偏置电容的单端上电压和开关电路，以在第一模式中将输入晶体管选择性地置于负反馈配置中以进行充电 将校准电压的输入偏置电容用于补偿积分放大器偏置电路，其中开关电路将输入节点和输入偏置电容连接在第二模式中，以将输入电流信号整合在反馈电容上以提供单端输出电压 输入偏置电容在输入节点保持零电压。

公开(公告)号：US08963607B1

公开(公告)日：2015-02-24

申请号：US14468009

申请日：2014-08-25

Applicant: Texas Instruments Incorporated

Inventor： Sandeep Kesrimal Oswal ,  Eeshan Miglani ,  H. Mohammed Shuaeb Fazeel ,  Pradeep Nair ,  Anand Hariraj Udupa

IPC: H03L5/00 ,  H03K5/003

CPC classification number: H03K5/003

Abstract: DC offset correction is provided with low frequency support. A first input terminal for receiving an input signal is selectively coupled to a resistance and a capacitor that are series coupled between the first input terminal and a corresponding output terminal. In a calibration phase, the series resistance is coupled between the input terminal and the capacitor and an average voltage level of the input is stored on capacitor. In a signal processing phase, the charged capacitor is coupled in series between the input terminal and the output terminal while the resistance is bypassed. The output signal obtained contains the high and low frequency components of the input signal, while the DC offset in the input signal is removed from the output signal. A differential circuit and methods are disclosed. Additional embodiments are disclosed.

Abstract translation: DC偏移校正提供低频支持。 用于接收输入信号的第一输入端选择性地耦合到串联耦合在第一输入端和相应输出端之间的电阻和电容。 在校准阶段，串联电阻耦合在输入端和电容之间，输入的平均电压电平存储在电容上。 在信号处理阶段，当电阻被旁路时，充电的电容器串联在输入端子和输出端子之间。 获得的输出信号包含输入信号的高频和低频分量，输入信号中的直流偏移从输出信号中去除。 公开了一种差分电路和方法。 公开了另外的实施例。