摘要:
Provided is a delta-sigma modulator having a differential output, the modulator including a switched-capacitor integrator configured to generate a non-inverted integral signal and an inverted integral signal and also including a switched-capacitor circuit configured to sample an input signal based on a control signal and to integrate the feedback signal and the input signal based on the control signal and also a feedback circuit configured to generate the feedback signal.
摘要:
A switched capacitor integrator circuit is disclosed. The switched capacitor integrator circuit comprises an inverting switched capacitor integrator circuit, and a non-inverting switched capacitor integrator circuit connected to the inverting switched capacitor integrator circuit. A sampling capacitor of the inverting switched capacitor integrator circuit is shared by the non-inverting switched capacitor integrator circuit.
摘要:
An integrator circuit is provided in the present invention, which utilizes a first capacitor and a first switching unit to sample an input signal and carries out distribution of charges between the first capacitor and a second capacitor. The second capacitor is larger than the first capacitor in capacitance. The integrator circuit transmits the charges stored in the second capacitor to a node of the first capacitor which is coupled to a ground previously. Accordingly, a direct current voltage level of the first capacitor may increase, facilitating an increase in a direct current voltage level at the second capacitor. Thereby, the accuracy and linearity of the integrator circuit may improve.
摘要:
A switched capacitor integrator circuit is disclosed. The switched capacitor integrator circuit comprises an inverting switched capacitor integrator circuit, and a non-inverting switched capacitor integrator circuit connected to the inverting switched capacitor integrator circuit. A sampling capacitor of the inverting switched capacitor integrator circuit is shared by the non-inverting switched capacitor integrator circuit.
摘要:
A circuit arrangement having a signal input configured to be supplied with a voltage signal; a first operational transconductance amplifier (OTA) having a voltage input that may be coupled to the signal input; at least one second OTA having a voltage input that may be coupled to the signal input; and at least one output capacitor which may be coupled to an output of the first OTA and to an output of the at least one second OTA, wherein an identical potential is set at the outputs of the first OTA and of the at least one second OTA.
摘要:
An arrangement for charge integration comprises an input (1) for the provision of a charge-dependent signal and an integrator (30) to integrate a signal present at its input. In addition, a coupling circuit (20) that can adopt at least two operating states is provided to couple the input (1) to the integrator (30) which has a temperature-dependent coupling characteristic. A correction circuit (10) that can be operated by a clock signal is coupled to the input (1) in order to transfer a quantity of charge, and has a temperature characteristic that is derived from the coupling characteristic of the coupling circuit (20).
摘要:
A circuit arrangement having a signal input configured to be supplied with a voltage signal; a first operational transconductance amplifier (OTA) having a voltage input that may be coupled to the signal input; at least one second OTA having a voltage input that may be coupled to the signal input; and at least one output capacitor which may be coupled to an output of the first OTA and to an output of the at least one second OTA, wherein an identical potential is set at the outputs of the first OTA and of the at least one second OTA.
摘要:
A voltage integrator, comprising a resistor (4) and a capacitor (5) connected in series between an input voltage (V) and ground, wherein the resistance (R) of said resistor and the capacitance (C) of said capacitor are adapted such that a voltage (Vc) across said capacitor approximates the integral of said input voltage (V). Means are provided for preventing said capacitor voltage (Vc) from falling below a lower limit, preferably zero, thereby ensuring automatic initialization of the integrator after each integration cycle.
摘要:
An exemplary electronic circuit of the present include first and second buffers 34 and 38, which are preferably unity gain buffers. A first switch 36 (e.g., a NMOS transistor or a CMOS transmission gate) is coupled between the output of the first buffer 34 and the first terminal of a capacitor 40. The input of the second buffer 38 is also coupled to the first terminal of the capacitor 40. A second switch 42 is coupled between the second terminal of the capacitor 40 and a first voltage node Va and a third switch 44 is coupled between the second terminal of the capacitor 40 and a second voltage node Vb. This circuit can be used as an integrator in a number of applications.
摘要:
An integrator input circuit is disclosed. The circuit includes a voltage-current converting unit for converting a voltage into a current based on an amplifying and voltage dropping operation and outputting the thusly converted current, a current dividing unit for receiving an output current from the voltage-current converting unit and dividing the thusly received output current in a single form or multiple forms at a predetermined ratio, and an integrator for receiving the current in a single form or multiple forms and having a single input/output or a differential input/output for implementing an integrating operation, thereby implementing an integrator having a predetermined frequency bandwidth without adjusting a resistance or a capacitance by forming a current flowing path, by which the current from an output terminal of a voltage-current conversion unit converting an input voltage of an integrator into a current is divided at a predetermined ratio, and by inputting a part of the current into the integrator.