-
公开(公告)号：US11664786B2
公开(公告)日：2023-05-30
申请号：US17836283
申请日：2022-06-09
发明人： Yuki Okamoto , Kei Takahashi
IPC分类号： H03K5/08 , H03K3/0233 , H01M10/48 , H02J7/02 , H03K17/22 , H03K19/0185 , G06G7/186 , H03K19/20
CPC分类号： H03K3/02337 , G06G7/186 , H01M10/48 , H02J7/02 , H03K5/084 , H03K17/223 , H03K19/018557 , H03K19/20 , H03K2217/96074
摘要： To provide a hysteresis comparator having a small circuit area and low power consumption. The hysteresis comparator includes a comparator, a switch, a first capacitor, a second capacitor, and a logic circuit. A first terminal of the switch is electrically connected to one of a pair of conductive regions of the first capacitor, one of a pair of conductive regions of the second capacitor, and a first input terminal of the comparator. An output terminal of the comparator is electrically connected to an input terminal of the logic circuit. An output terminal of the logic circuit is electrically connected to the other of the pair of conductive regions of the second capacitor. The logic circuit has a function of generating an inverted signal of a signal input to the input terminal of the logic circuit and outputting the inverted signal to the output terminal of the logic circuit. A reference potential is input to the first input terminal of the comparator and the reference potential is held by the switch. Due to change in the potential of the output terminal of the comparator, the reference potential is changed by capacitive coupling of the second capacitor.
-
公开(公告)号：US20220329233A1
公开(公告)日：2022-10-13
申请号：US17836283
申请日：2022-06-09
发明人： Yuki OKAMOTO , Kei TAKAHASHI
IPC分类号： H03K3/0233 , H01M10/48 , H02J7/02 , H03K17/22 , H03K19/0185 , G06G7/186 , H03K5/08 , H03K19/20
摘要： To provide a hysteresis comparator having a small circuit area and low power consumption. The hysteresis comparator includes a comparator, a switch, a first capacitor, a second capacitor, and a logic circuit. A first terminal of the switch is electrically connected to one of a pair of conductive regions of the first capacitor, one of a pair of conductive regions of the second capacitor, and a first input terminal of the comparator. An output terminal of the comparator is electrically connected to an input terminal of the logic circuit. An output terminal of the logic circuit is electrically connected to the other of the pair of conductive regions of the second capacitor. The logic circuit has a function of generating an inverted signal of a signal input to the input terminal of the logic circuit and outputting the inverted signal to the output terminal of the logic circuit. A reference potential is input to the first input terminal of the comparator and the reference potential is held by the switch. Due to change in the potential of the output terminal of the comparator, the reference potential is changed by capacitive coupling of the second capacitor.
-
公开(公告)号：US20220239308A1
公开(公告)日：2022-07-28
申请号：US17160718
申请日：2021-01-28
发明人： Roberto S. MAURINO
摘要： Devices and methods that aim to improve flicker noise rejection in switched-capacitor (SC) integrators are disclosed. An example SC integrator includes a first and a second sampling capacitors, an amplifier, an integrating capacitor, coupled at least to an output of the amplifier, and a switching arrangement. By adding (i.e., integrating in the integrating capacitor) sign-inverted samples of a flicker noise of the amplifier at every clock cycle of a master clock and by keeping the time distance/delay between those samples relatively small regardless of the master clock frequency, such a SC integrator may provide improvements in terms of rejecting the flicker noise of the amplifier.
-
公开(公告)号：US20200280261A1
公开(公告)日：2020-09-03
申请号：US16789251
申请日：2020-02-12
发明人： Kazuma Hirao
IPC分类号： H02M3/335 , H02M1/08 , G01R19/165 , H03K5/24 , G06G7/186
摘要： A switching regulator includes a switching element, a rectifier element, an output capacitor having one electrode connected to an output terminal, a control circuit which supplies a pulse width modulation signal in accordance with a voltage of the output terminal to a control terminal of the switching element, a load determination circuit which outputs a determination signal in accordance with a load, based on a voltage of the control terminal of the switching element, and a variable inductance circuit including a plurality of coils and having an inductance value which is switchable based on the determination signal.
-
公开(公告)号：US10348284B2
公开(公告)日：2019-07-09
申请号：US15714611
申请日：2017-09-25
摘要： A summing circuit, including a capacitor, a switching circuit capable of connecting the capacitor between a first node (ana) and a second node (ref), between a third node and the second node in a first connection direction or between the third node and the second node in a second connection direction, an integrator coupled to the third node, a hysteresis comparator coupled to the output of the integrator, and a counter coupled to the output of the hysteresis comparator.
-
6.发明授权Low noise and low power passive sampling network for a switched-capacitor ADC with a slow reference generator 有权低噪声和低功耗的无源采样网络，用于带缓慢参考发生器的开关电容ADC公开(公告)号：US09411987B2
公开(公告)日：2016-08-09
申请号：US14826928
申请日：2015-08-14
发明人： Dinesh Jagannath Alladi , Yuhua Guo
摘要： Certain aspects of the present disclosure provide various sampling networks for switched-capacitor integrators, which may be used in switched-capacitor analog-to-digital converters (ADCs). Rather than having both an input sampling capacitor and a reference sampling capacitor, certain aspects of the present disclosure use a shared sampling capacitor for the reference voltage and the input voltage, thereby reducing ADC input-referred noise, decreasing op amp area and power, and avoiding anti-aliasing filter insertion loss. Furthermore, by sampling the reference voltage during the sampling phase and sampling the input voltage during the integration phase using the shared sampling capacitor, a high-bandwidth reference buffer need not be used for the reference voltage.
摘要翻译： 本公开的某些方面提供用于开关电容器积分器的各种采样网络，其可用于开关电容器模数转换器（ADC）。 不同于输入采样电容器和参考采样电容器两者，本公开的某些方面使用共享采样电容器作为参考电压和输入电压，从而减少ADC输入参考噪声，降低运算放大器面积和功率，以及 避免抗混叠滤波器插入损耗。 此外，通过在采样阶段对参考电压进行采样并使用共享采样电容在积分阶段对输入电压进行采样，高参考电压不需要用于参考电压。
-
7.发明授权公开(公告)号：US09171189B2
公开(公告)日：2015-10-27
申请号：US14086181
申请日：2013-11-21
发明人： Yannis Tsividis , Ning Guo
IPC分类号： G06G7/186
CPC分类号： G06G7/1865
摘要： Systems and methods for preventing saturation of analog integrator outputs are provided. Applications of the systems and methods in hybrid analog-digital integrators are also provided. Exemplary systems include two switches, one operational amplifier, one capacitor C, four gain blocks, three comparators, one XOR gate, one OR gate, one T flip-flop, and one digital counter.
摘要翻译： 提供了用于防止模拟积分器输出饱和的系统和方法。 还提供了系统和方法在混合模拟数字积分器中的应用。 示例性系统包括两个开关，一个运算放大器，一个电容器C，四个增益块，三个比较器，一个异或门，一个或门，一个T触发器和一个数字计数器。
-
公开(公告)号：US09041442B2
公开(公告)日：2015-05-26
申请号：US13888454
申请日：2013-05-07
发明人： Roh Yamamoto , Kazunori Watanabe
CPC分类号： H03F3/45076 , G06G7/186 , H03F2203/45116 , H03F2203/45332 , H03K17/002
摘要： A semiconductor device including an integrator circuit, in which electric discharge from a capacitor can be reduced to shorten time required for charging the capacitor in the case where supply of power supply voltage is stopped and restarted, and a method for driving the semiconductor device are provided. One embodiment has a structure in which a transistor with small off-state current is electrically connected in series to a capacitor in an integrator circuit. Further, in one embodiment of the present invention, a transistor with small off-state current is electrically connected in series to a capacitor in an integrator circuit; the transistor is on in a period during which power supply voltage is supplied; and the transistor is off in a period during which supply of the power supply voltage is stopped.
摘要翻译： 一种包括积分电路的半导体器件，其中可以减少来自电容器的放电，以缩短在停止并重新启动电源电压的情况下为电容器充电所需的时间，以及驱动该半导体器件的方法 。 一个实施例具有其中具有小截止电流的晶体管与积分电路中的电容器串联电连接的结构。 此外，在本发明的一个实施例中，具有小截止电流的晶体管与积分电路中的电容器串联电连接; 在提供电源电压的期间，晶体管导通; 在停止供电电压的期间，晶体管截止。
-
9.发明申请Compensated operational amplifier and active RC filter including such an amplifier 有权补偿运算放大器和有源RC滤波器，包括这样的放大器公开(公告)号：US20080284490A1
公开(公告)日：2008-11-20
申请号：US11804636
申请日：2007-05-18
申请人： Bernard Tenbroek
发明人： Bernard Tenbroek
CPC分类号： H03F1/301 , H03F3/45183
摘要： A method of compensating a monolithic integrated operational amplifier against process and temperature variations, such that the operational amplifier is suitable for use in an active filter, the method comprising a providing an amplifier having a first stage and an output stage, wherein the output stage drives an RC load, and wherein a compensation capacitor at an output of the first stage is selected so as to scale with the capacitance C of the RC load, and a transconductance of the first stage is a function of the resistance R of the RC load.
摘要翻译： 一种补偿单片集成运算放大器抵抗过程和温度变化的方法，使得运算放大器适用于有源滤波器，该方法包括提供具有第一级和输出级的放大器，其中输出级驱动 RC负载，并且其中选择在第一级的输出处的补偿电容器以与RC负载的电容C成比例，并且第一级的跨导是RC负载的电阻R的函数。
-
公开(公告)号：US6166676A
公开(公告)日：2000-12-26
申请号：US179099
申请日：1998-10-27
申请人： Kunihiko Iizuka
发明人： Kunihiko Iizuka
CPC分类号： G06J1/005
摘要： In a correlating device, two switched-capacitor-type analog signal integrators are connected in cascade. The analog signal integrator in the first stage samples an analog input voltage at a predetermined cycle, determines the sign of the sampled value according to a binary-code sequence, integrates the sampled value, and outputs the resultant value. The analog signal integrator in the next stage samples an input voltage at a reset cycle of the analog signal integrator in the first stage, integrates the sampled value, and outputs the resultant value. This structure can prevent saturation of the correlating device without decreasing the gain of each analog signal integrator to a greet degree even when the sequence length becomes longer. Therefore, even if a high operation speed is required and if the sequence length of the binary-code sequence becomes longer, it is possible to provide a correlating device capable of achieving both an improvement of the operation accuracy and a reduction in the power consumption at a time.
摘要翻译： 在相关设备中，两个开关电容器型模拟信号积分器级联连接。 第一级中的模拟信号积分器以预定的周期对模拟输入电压进行采样，根据二进制码序列确定采样值的符号，对采样值进行积分，并输出结果值。 下一级的模拟信号积分器在第一级的模拟信号积分器的复位周期对输入电压进行采样，对采样值进行积分，并输出结果值。 即使当序列长度变长时，这种结构也可以防止相关设备的饱和，而不会将每个模拟信号积分器的增益降低到迎接程度。 因此，即使要求较高的运行速度，并且二进制码序列的序列长度变长的话，也可以提供一种相关装置，能够实现操作精度的提高和电力消耗的降低 一次
-
-
-
-
-
-
-
-
-
搜索结果
320 条记录 (耗时 0.023 秒)
