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    CONTACT AND VIA STRUCTURES FOR SEMICONDUCTOR DEVICES
    42.
    发明申请
    CONTACT AND VIA STRUCTURES FOR SEMICONDUCTOR DEVICES 有权

    公开(公告)号：US20220336642A1

    公开(公告)日：2022-10-20

    申请号：US17856179

    申请日：2022-07-01

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Mrunal A. Khaderbad ,  Keng-Chu Lin

    IPC: H01L29/66 ,  H01L29/417 ,  H01L29/78 ,  H01L21/8234 ,  H01L21/768 ,  H01L29/40

    Abstract: The structure of a semiconductor device with source/drain contact structures and via structures and a method of fabricating the semiconductor device are disclosed. A method for fabricating a semiconductor device includes forming a source/drain (S/D) region on a substrate, forming a S/D contact structure on the S/D region, and forming a via structure on the S/D contact structure. The forming of the via structure includes forming a via opening on the S/D contact structure, forming a non-metal passivation layer on sidewalls of the via opening, and depositing a via plug within the via opening in a bottom-up deposition process.

    Integrated circuit isolation feature and method of forming the same
    45.
    发明授权
    Integrated circuit isolation feature and method of forming the same 有权

    公开(公告)号：US11387138B2

    公开(公告)日：2022-07-12

    申请号：US16362965

    申请日：2019-03-25

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Chih-Tang Peng ,  Shuen-Shin Liang ,  Keng-Chu Lin ,  Teng-Chun Tsai

    IPC: H01L21/762 ,  H01L21/8234 ,  H01L21/768 ,  H01L21/02

    Abstract: Examples of a technique for forming a dielectric material for an integrated circuit are provided herein. In an example, an integrated circuit workpiece is received that includes a recess. A first dielectric precursor is deposited in the recess. The first dielectric precursor includes a non-semiconductor component. A second dielectric precursor is deposited in the recess on the first dielectric precursor, and an annealing process is performed such that a portion of the non-semiconductor component of the first dielectric precursor diffuses into the second dielectric precursor. The non-semiconductor component may include oxygen, and the annealing process may be performed in one of a vacuum or an inert gas environment.

    TUNABLE LOW-K INNER AIR SPACERS OF SEMICONDUCTOR DEVICES
    47.
    发明申请
    TUNABLE LOW-K INNER AIR SPACERS OF SEMICONDUCTOR DEVICES 有权

    公开(公告)号：US20210407856A1

    公开(公告)日：2021-12-30

    申请号：US16916397

    申请日：2020-06-30

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Chen-Han Wang ,  Keng-Chu Lin ,  Shuen-Shin Liang ,  Tetsuji Ueno ,  Ting-Ting Chen

    IPC: H01L21/8234 ,  H01L29/66 ,  H01L29/78

    Abstract: The present disclosure describes a method of fabricating a semiconductor structure that includes forming a fin structure on a substrate, forming a polysilicon gate structure on a first portion of the fin structure, forming an opening in a second portion of the fin structure, wherein the first and second portions of the fin structure is adjacent to each other, forming a recess laterally on a sidewall of the first portion of the fin structure underlying the polysilicon gate structure, and forming an inner spacer structure within the recess. The inner spacer structure comprises an inner air spacer enclosed by a first dielectric spacer layer and a second dielectric spacer layer.

    Liner-Free Conductive Structures with Anchor Points
    49.
    发明申请
    Liner-Free Conductive Structures with Anchor Points 有权

    公开(公告)号：US20210233861A1

    公开(公告)日：2021-07-29

    申请号：US16936335

    申请日：2020-07-22

    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

    Inventor： Hsu-Kai Chang ,  Keng-Chu Lin ,  Sung-Li Wang ,  Shuen-Shin Liang ,  Chia-Hung Chu

    IPC: H01L23/532 ,  H01L23/522 ,  H01L21/768

    Abstract: The present disclosure describes a method for forming liner-free or barrier-free conductive structures. The method includes depositing an etch stop layer on a cobalt contact disposed on a substrate, depositing a dielectric on the etch stop layer, etching the dielectric and the etch stop layer to form an opening that exposes a top surface of the cobalt contact, and etching the exposed top surface of the cobalt contact to form a recess in the cobalt contact extending laterally under the etch stop layer. The method further includes depositing a ruthenium metal to substantially fill the recess and the opening, and annealing the ruthenium metal to form an oxide layer between the ruthenium metal and the dielectric.

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