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    Semiconductor package and manufacturing method thereof
    41.
    发明授权
    Semiconductor package and manufacturing method thereof 有权

    公开(公告)号：US11502015B2

    公开(公告)日：2022-11-15

    申请号：US16885304

    申请日：2020-05-28

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Wen-Wei Shen ,  Sung-Hui Huang ,  Shang-Yun Hou ,  Kuan-Yu Huang

    IPC: H01L23/31 ,  H01L21/56 ,  H01L23/00 ,  H01L25/18 ,  H01L25/00 ,  H01L21/268 ,  H01L23/29

    Abstract: Semiconductor package includes interposer, dies, encapsulant. Each die includes active surface, backside surface, side surfaces. Backside surface is opposite to active surface. Side surfaces join active surface to backside surface. Encapsulant includes first material and laterally wraps dies. Dies are electrically connected to interposer and disposed side by side on interposer with respective backside surfaces facing away from interposer. At least one die includes an outer corner. A rounded corner structure is formed at the outer corner. The rounded corner structure includes second material different from first material. The outer corner is formed by backside surface and a pair of adjacent side surfaces of the at least one die. The side surfaces of the pair have a common first edge. Each side surface of the pair does not face other dies and has a second edge in common with backside surface of the at least one die.

    Optical Transceiver and Manufacturing Method Thereof
    43.
    发明申请
    Optical Transceiver and Manufacturing Method Thereof 有权

    公开(公告)号：US20210132310A1

    公开(公告)日：2021-05-06

    申请号：US17121060

    申请日：2020-12-14

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Chen-Hua Yu ,  Hsing-Kuo Hsia ,  Sung-Hui Huang ,  Kuan-Yu Huang ,  Kuo-Chiang Ting ,  Shang-Yun Hou ,  Chi-Hsi Wu

    IPC: G02B6/42 ,  H01L23/00

    Abstract: A structure including a photonic integrated circuit die, an electric integrated circuit die, a semiconductor dam, and an insulating encapsulant is provided. The photonic integrated circuit die includes an optical input/output portion and a groove located in proximity of the optical input/output portion, wherein the groove is adapted for lateral insertion of at least one optical fiber. The electric integrated circuit die is disposed over and electrically connected to the photonic integrated circuit die. The semiconductor dam is disposed over the photonic integrated circuit die. The insulating encapsulant is disposed over the photonic integrated circuit die and laterally encapsulates the electric integrated circuit die and the semiconductor dam.

    Chip package structure
    44.
    发明授权
    Chip package structure 有权

    公开(公告)号：US10790254B2

    公开(公告)日：2020-09-29

    申请号：US16277806

    申请日：2019-02-15

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Kuan-Yu Huang ,  Sung-Hui Huang ,  Shu-Chia Hsu ,  Leu-Jen Chen ,  Yi-Wei Liu ,  Shang-Yun Hou ,  Jui-Hsieh Lai ,  Tsung-Yu Chen ,  Chien-Yuan Huang ,  Yu-Wei Chen

    IPC: H01L29/40 ,  H01L21/44 ,  H01L23/00 ,  H01L21/56 ,  H01L23/522

    Abstract: A chip package structure is provided. The chip package structure includes a substrate having a first surface and a second surface opposite to the first surface. The chip package structure includes a first chip structure and a second chip structure over the first surface. The chip package structure includes a protective layer over the first surface and surrounding the first chip structure and the second chip structure. A portion of the protective layer is between the first chip structure and the second chip structure. The chip package structure includes a first anti-warpage bump over the second surface and extending across the portion of the protective layer. The chip package structure includes a conductive bump over the second surface and electrically connected to the first chip structure or the second chip structure. The first anti-warpage bump is wider than the conductive bump.

    OPTICAL TRANSCEIVER AND MANUFACTURING METHOD THEREOF
    46.
    发明申请
    OPTICAL TRANSCEIVER AND MANUFACTURING METHOD THEREOF 有权

    公开(公告)号：US20240385398A1

    公开(公告)日：2024-11-21

    申请号：US18787083

    申请日：2024-07-29

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Chen-Hua Yu ,  Hsing-Kuo Hsia ,  Sung-Hui Huang ,  Kuan-Yu Huang ,  Kuo-Chiang Ting ,  Chi-Hsi Wu ,  Shang-Yun Hou

    IPC: G02B6/42 ,  H01L23/00 ,  H01L23/48

    Abstract: A structure including a photonic integrated circuit die, an electric integrated circuit die, a semiconductor dam, and an insulating encapsulant is provided. The photonic integrated circuit die includes an optical input/output portion and a groove located in proximity of the optical input/output portion, wherein the groove is adapted for lateral insertion of at least one optical fiber. The electric integrated circuit die is disposed over and electrically connected to the photonic integrated circuit die. The semiconductor dam is disposed over the photonic integrated circuit die. The insulating encapsulant is disposed over the photonic integrated circuit die and laterally encapsulates the electric integrated circuit die and the semiconductor dam.

    Photonic Semiconductor Device and Method of Manufacture
    48.
    发明申请
    Photonic Semiconductor Device and Method of Manufacture 有权

    公开(公告)号：US20220365278A1

    公开(公告)日：2022-11-17

    申请号：US17873779

    申请日：2022-07-26

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Chen-Hua Yu ,  Hsing-Kuo Hsia ,  Kuo-Chiang Ting ,  Sung-Hui Huang ,  Shang-Yun Hou ,  Chi-Hsi Wu

    IPC: G02B6/122

    Abstract: A device includes a first package connected to an interconnect substrate, wherein the interconnect substrate includes conductive routing; and a second package connected to the interconnect substrate, wherein the second package includes a photonic layer on a substrate, the photonic layer including a silicon waveguide coupled to a grating coupler and to a photodetector; a via extending through the substrate; an interconnect structure over the photonic layer, wherein the interconnect structure is connected to the photodetector and to the via; and an electronic die bonded to the interconnect structure, wherein the electronic die is connected to the interconnect structure.

    Package structure and method of fabricating the same
    49.
    发明授权
    Package structure and method of fabricating the same 有权

    公开(公告)号：US11424219B2

    公开(公告)日：2022-08-23

    申请号：US16903392

    申请日：2020-06-17

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Wen-Wei Shen ,  Sung-Hui Huang ,  Shang-Yun Hou

    IPC: H01L23/498 ,  H01L23/31 ,  H01L23/538 ,  H01L25/065 ,  H01L21/56 ,  H01L21/683

    Abstract: A package structure includes a circuit substrate and a semiconductor device. The semiconductor device is disposed on and electrically connected to the circuit substrate. The semiconductor device includes an interconnection structure, a semiconductor die, an insulating encapsulant, a protection layer and electrical connectors. The interconnection structure has a first surface and a second surface. The semiconductor die is disposed on the first surface and electrically connected to the interconnection structure. The insulating encapsulant is encapsulating the semiconductor die and partially covering sidewalls of the interconnection structure. The protection layer is disposed on the second surface of the interconnection structure and partially covering the sidewalls of the interconnection structure, wherein the protection layer is in contact with the insulating encapsulant. The electrical connectors are disposed on the protection layer, wherein the interconnection structure is electrically connected to the circuit substrate through the plurality of electrical connectors.

    PACKAGE AND MANUFACTURING METHOD THEREOF
    50.
    发明申请
    PACKAGE AND MANUFACTURING METHOD THEREOF 有权

    公开(公告)号：US20220013495A1

    公开(公告)日：2022-01-13

    申请号：US16924203

    申请日：2020-07-09

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Sung-Hui Huang ,  Shang-Yun Hou ,  Kuan-Yu Huang

    IPC: H01L25/065 ,  H01L23/00 ,  H01L23/31 ,  H01L23/48 ,  H01L21/56

    Abstract: A package includes a first die, a second die, a semiconductor frame, and a reinforcement structure. The first die has a first surface and a second surface opposite to the first surface. The first die includes grooves on the first surface. The second die and the semiconductor frame are disposed side by side over the first surface of the first die. The semiconductor frame has at least one notch exposing the grooves of the first die. The reinforcement structure is disposed on the second surface of the first die. The reinforcement structure includes a first portion aligned with the grooves.

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