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公开(公告)号：US20230275030A1
公开(公告)日：2023-08-31
申请号：US18303543
申请日：2023-04-19
发明人： Tzu-Sung Huang , Cheng-Chieh Hsieh , Hsiu-Jen Lin , Hui-Jung Tsai , Hung-Yi Kuo , Hao-Yi Tsai , Ming-Hung Tseng , Yen-Liang Lin , Chun-Ti Lu , Chung-Ming Weng
IPC分类号： H01L23/538 , H01L23/31 , H01L25/065 , H01L25/00 , H01L21/56 , H01L21/78 , H01L23/00
CPC分类号： H01L23/5389 , H01L23/3121 , H01L25/0657 , H01L25/50 , H01L21/56 , H01L21/78 , H01L24/94
摘要： A package structure including a first semiconductor die, a second semiconductor die, first conductive pillars and a first insulating encapsulation is provided. The first semiconductor die includes a semiconductor substrate, an interconnect structure and a first redistribution circuit structure. The semiconductor substrate includes a first portion and a second portion disposed on the first portion. The interconnect structure is disposed on the second portion, the first redistribution circuit structure is disposed on the interconnect structure, and the lateral dimension of the first portion is greater than the lateral dimension of the second portion. The second semiconductor die is disposed on the first semiconductor die. The first conductive pillars are disposed on the first redistribution circuit structure of the first semiconductor die. The first insulating encapsulation is disposed on the first portion. The first insulating encapsulation laterally encapsulates the second semiconductor die, the first conductive pillars and the second portion.
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公开(公告)号：US20230207313A1
公开(公告)日：2023-06-29
申请号：US17752473
申请日：2022-05-24
发明人： Chung-Lei Chen , Anhao Cheng , Meng-I Kang , Yen-Liang Lin
IPC分类号： H01L21/02
CPC分类号： H01L21/02532 , H01L21/02554
摘要： A semiconductor device includes a first silicon layer. The semiconductor device includes a plurality of first buried oxide layers embedded in the first silicon layer. The semiconductor device includes a second silicon layer disposed over the plurality of first buried oxide layers. Vertical distances between the plurality of first buried oxide layers and the second silicon layer, respectively, are different.
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公开(公告)号：US11664325B2
公开(公告)日：2023-05-30
申请号：US17666579
申请日：2022-02-08
发明人： Tzu-Sung Huang , Cheng-Chieh Hsieh , Hsiu-Jen Lin , Hui-Jung Tsai , Hung-Yi Kuo , Hao-Yi Tsai , Ming-Hung Tseng , Yen-Liang Lin , Chun-Ti Lu , Chung-Ming Weng
IPC分类号： H01L21/56 , H01L23/538 , H01L23/31 , H01L25/065 , H01L25/00 , H01L21/78 , H01L23/00
CPC分类号： H01L23/5389 , H01L21/56 , H01L21/78 , H01L23/3121 , H01L24/94 , H01L25/0657 , H01L25/50
摘要： A package structure including a first semiconductor die, a second semiconductor die, first conductive pillars and a first insulating encapsulation is provided. The first semiconductor die includes a semiconductor substrate, an interconnect structure and a first redistribution circuit structure. The semiconductor substrate includes a first portion and a second portion disposed on the first portion.
The interconnect structure is disposed on the second portion, the first redistribution circuit structure is disposed on the interconnect structure, and the lateral dimension of the first portion is greater than the lateral dimension of the second portion. The second semiconductor die is disposed on the first semiconductor die. The first conductive pillars are disposed on the first redistribution circuit structure of the first semiconductor die. The first insulating encapsulation is disposed on the first portion. The first insulating encapsulation laterally encapsulates the second semiconductor die, the first conductive pillars and the second portion.-
公开(公告)号：US20220165675A1
公开(公告)日：2022-05-26
申请号：US17666579
申请日：2022-02-08
发明人： Tzu-Sung Huang , Cheng-Chieh Hsieh , Hsiu-Jen Lin , Hui-Jung Tsai , Hung-Yi Kuo , Hao-Yi Tsai , Ming-Hung Tseng , Yen-Liang Lin , Chun-Ti Lu , Chung-Ming Weng
IPC分类号： H01L23/538 , H01L23/31 , H01L25/065 , H01L25/00 , H01L21/56 , H01L21/78 , H01L23/00
摘要： A package structure including a first semiconductor die, a second semiconductor die, first conductive pillars and a first insulating encapsulation is provided. The first semiconductor die includes a semiconductor substrate, an interconnect structure and a first redistribution circuit structure. The semiconductor substrate includes a first portion and a second portion disposed on the first portion.
The interconnect structure is disposed on the second portion, the first redistribution circuit structure is disposed on the interconnect structure, and the lateral dimension of the first portion is greater than the lateral dimension of the second portion. The second semiconductor die is disposed on the first semiconductor die. The first conductive pillars are disposed on the first redistribution circuit structure of the first semiconductor die. The first insulating encapsulation is disposed on the first portion. The first insulating encapsulation laterally encapsulates the second semiconductor die, the first conductive pillars and the second portion.-
公开(公告)号：US20220139839A1
公开(公告)日：2022-05-05
申请号：US17577118
申请日：2022-01-17
发明人： Chen-Hua Yu , Jen-Fu Liu , Ming Hung Tseng , Tsung-Hsien Chiang , Yen-Liang Lin , Tzu-Sung Huang
IPC分类号： H01L23/538 , H01L21/48 , H01L21/56 , H01L21/683 , H01L23/29 , H01L23/31 , H01L23/00 , H01L25/10 , H01L25/00
摘要： In an embodiment, a structure includes: a first integrated circuit die including first die connectors; a first dielectric layer on the first die connectors; first conductive vias extending through the first dielectric layer, the first conductive vias connected to a first subset of the first die connectors; a second integrated circuit die bonded to a second subset of the first die connectors with first reflowable connectors; a first encapsulant surrounding the second integrated circuit die and the first conductive vias, the first encapsulant and the first integrated circuit die being laterally coterminous; second conductive vias adjacent the first integrated circuit die; a second encapsulant surrounding the second conductive vias, the first encapsulant, and the first integrated circuit die; and a first redistribution structure including first redistribution lines, the first redistribution lines connected to the first conductive vias and the second conductive vias.
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公开(公告)号：US20210225812A1
公开(公告)日：2021-07-22
申请号：US17222041
申请日：2021-04-05
发明人： Chen-Hua Yu , Ming Hung Tseng , Yen-Liang Lin , Tzu-Sung Huang , Tin-Hao Kuo , Hao-Yi Tsai
IPC分类号： H01L25/065 , H01L23/00 , H01L23/498 , H01L21/768 , H01L21/56 , H01L25/00 , H01L21/683 , H01L23/31 , H01L23/538 , H01L25/10
摘要： A method includes forming a first redistribution structure by depositing a first dielectric layer and forming first and second conductive features on the first dielectric layer, the second conductive feature being provided with a gap exposing the first dielectric layer. The method further includes depositing a second dielectric layer on the first and second conductive features; forming first and second openings in the second dielectric layer, the first opening exposing the first conductive feature and the second opening exposing the second conductive feature and the gap; forming a first via on the first conductive feature and partially in the first opening; forming a second via on the second conductive feature and partially in the second opening and the gap; attaching a die to the first redistribution structure adjacent the first via and the second via; and encapsulating the die, the first via, and the second via with an encapsulant.
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公开(公告)号：US10686005B2
公开(公告)日：2020-06-16
申请号：US16263750
申请日：2019-01-31
发明人： Chia-Yu Wei , Chin-Hsun Hsiao , Yi-Hsing Chu , Yen-Liang Lin , Yung-Lung Hsu , Hsin-Chi Chen
IPC分类号： H01L27/146
摘要： A semiconductor structure includes a semiconductive substrate including a first side and a second side opposite to the first side, a radiation sensing device disposed in the semiconductive substrate, and an ILD disposed over the first side of the semiconductive substrate, and a conductive pad disposed within the semiconductive substrate and the ILD, and electrically connected to an interconnect structure. A top surface of the conductive pad is between the first side of the semiconductive substrate and the second side of the semiconductor substrate.
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公开(公告)号：US10475755B2
公开(公告)日：2019-11-12
申请号：US16173450
申请日：2018-10-29
发明人： Vincent Chen , Hung-Yi Kuo , Chuei-Tang Wang , Hao-Yi Tsai , Chen-Hua Yu , Wei-Ting Chen , Ming Hung Tseng , Yen-Liang Lin
摘要： A method of manufacturing a semiconductor structure includes providing a transceiver, forming a molding to surround the transceiver, forming a plurality of recesses extending through the molding, disposing a conductive material into the plurality of recesses to form a plurality of vias, disposing and patterning an insulating layer over the molding, the plurality of vias and the transceiver, and forming a redistribution layer (RDL) over the insulating layer, wherein the RDL comprises an antenna disposed over the insulating layer and a dielectric layer covering the antenna, and a portion of the antenna is extended through the insulating layer and is electrically connected with the transceiver.
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公开(公告)号：US20190103379A1
公开(公告)日：2019-04-04
申请号：US15782993
申请日：2017-10-13
发明人： Chen-Hua Yu , Ming Hung Tseng , Yen-Liang Lin , Tzu-Sung Huang , Tin-Hao Kuo , Hao-Yi Tsai
IPC分类号： H01L25/065 , H01L23/498 , H01L21/768 , H01L23/00
摘要： A device is provided, including: a first device package including: a first redistribution structure including a first redistribution line and a second redistribution line; a die on the first redistribution structure; a first via coupled to a first side of the first redistribution line; a second via coupled to a first side of the second redistribution line and extending through the second redistribution line; an encapsulant surrounding the die, the first via, and the second via; and a second redistribution structure over the encapsulant, the second redistribution structure electrically connected to the die, the first via, and the second via; a first conductive connector coupled to a second side of the first redistribution line, the first conductive connector disposed along a different axis than a longitudinal axis of the first via; and a second conductive connector coupled to a second side of the second redistribution line, the second conductive connector disposed along a longitudinal axis of the second via.
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50.发明授权公开(公告)号：US10153243B2
公开(公告)日：2018-12-11
申请号：US15497408
申请日：2017-04-26
发明人： Yu-Jen Tseng , Yen-Liang Lin , Tin-Hao Kuo , Chen-Shien Chen , Mirng-Ji Lii
IPC分类号： H01L23/00 , H01L23/528 , H01L23/498 , H01L23/488 , H01L21/44 , H01L21/47 , H01L21/283 , H01L21/02 , H01L21/027 , H01L25/065 , H01L23/31 , H01L21/56
摘要： Semiconductor devices, methods of manufacture thereof, and packaged semiconductor devices are disclosed. A method of forming a device includes forming a conductive trace over a first substrate, the conductive trace having first tapering sidewalls, forming a conductive bump over a second substrate, the conductive bump having second tapering sidewalls and a first surface distal the second substrate, and attaching the conductive bump to the conductive trace via a solder region. The solder region extends from the first surface of the conductive bump to the first substrate, and covers the first tapering sidewalls of the conductive trace. The second tapering sidewalls of the conductive bump are free of the solder region.
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