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Patent Agency Ranking
公开(公告)号：US09866112B1
公开(公告)日：2018-01-09
申请号：US15280412
申请日：2016-09-29
Applicant: Texas Instruments Incorporated
Inventor： Rajat Chauhan
Abstract: Methods and apparatus providing an ultra-low power bandgap reference using a clocked amplifier are disclosed. An example apparatus includes a clocked comparator to compare a first voltage to a second voltage when a clock signal pulses and output a comparison signal based on the comparison, the comparison signal being (A) a first signal when the first voltage is higher than the second voltage and (B) a second signal when the first voltage is lower than the second voltage; a monoshot to when the comparison signal is a first signal, output a first pulse; and when the comparison signal is a second signal, output a second pulse; and a charge pump to increase an output voltage when the monoshot outputs the first pulse; decrease the output voltage when the monoshot outputs the second pulse; and hold the output voltage when the monoshot is not outputting a pulse.
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42.发明授权公开(公告)号：US09812960B2
公开(公告)日：2017-11-07
申请号：US14983227
申请日：2015-12-29
Applicant: Texas Instruments Incorporated
Inventor： Keith Edmund Kunz , Vipul Kumar Singhal , Rajat Chauhan , Per Torstein Røine , Danielle Griffith
CPC classification number: H02M3/158 , H02M3/156 , H02M2001/0032 , H02M2003/1566 , Y02B70/16
Abstract: Methods and apparatus for DC-DC power controller with low standby current and fast transient response. In an example arrangement, an apparatus includes a voltage converter outputting a direct current output voltage, configured to increase the output voltage responsive to an enable control signal; at least one feedback comparator configured to output a first control signal, the feedback comparator being active responsive to an edge at a clock signal input; an adjustable frequency oscillator for outputting a first clock signal; and a fast transient detect circuit configured to output a second signal asynchronously upon detecting a rapid change greater than a voltage threshold in the output voltage; the voltage converter receiving the enable control signal when either the first clock signal is active, or the second signal is active and the output voltage is less than a reference voltage. Additional apparatus and methods are disclosed.
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43.发明申请公开(公告)号：US20170187286A1
公开(公告)日：2017-06-29
申请号：US14983227
申请日：2015-12-29
Applicant: Texas Instruments Incorporated
Inventor： Keith Edmund Kunz , Vipul Kumar Singhal , Rajat Chauhan , Per Torstein Røine , Danielle Griffith
IPC: H02M3/158
CPC classification number: H02M3/158 , H02M3/156 , H02M2001/0032 , H02M2003/1566 , Y02B70/16
Abstract: Methods and apparatus for DC-DC power controller with low standby current and fast transient response. In an example arrangement, an apparatus includes a voltage converter outputting a direct current output voltage, configured to increase the output voltage responsive to an enable control signal; at least one feedback comparator configured to output a first control signal, the feedback comparator being active responsive to an edge at a clock signal input; an adjustable frequency oscillator for outputting a first clock signal; and a fast transient detect circuit configured to output a second signal asynchronously upon detecting a rapid change greater than a voltage threshold in the output voltage; the voltage converter receiving the enable control signal when either the first clock signal is active, or the second signal is active and the output voltage is less than a reference voltage. Additional apparatus and methods are disclosed.
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公开(公告)号：US20170178714A1
公开(公告)日：2017-06-22
申请号：US15447230
申请日：2017-03-02
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Prajkta Vyavahare , Rajat Chauhan , Siva Srinivas Kothamasu
IPC: G11C11/4093 , G06F1/32 , G06F13/10 , G11C11/4094 , G11C11/4074
CPC classification number: G11C11/4093 , G06F1/3296 , G06F13/102 , G11C7/1057 , G11C11/4074 , G11C11/4094 , H03K17/687 , Y02D10/14
Abstract: The disclosure provides an input/output (IO) circuit powered by an input/output (IO) supply voltage. The IO circuit includes a cutoff circuit that receives a first invert signal, the IO supply voltage, a bias voltage and a pad voltage. An output stage is coupled to the cutoff circuit. The output stage receives a first signal, a second signal and the bias voltage. A pad is coupled to the output stage, and a voltage generated at the pad is the pad voltage. The cutoff circuit and the output stage maintain the pad voltage at logic high when the IO supply voltage transition below a defined threshold.
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公开(公告)号：US20150092308A1
公开(公告)日：2015-04-02
申请号：US14043583
申请日：2013-10-01
Applicant: Texas Instruments Incorporated
Inventor： Venkateswara Reddy P , Vinayak Ghatawade , Rajat Chauhan
CPC classification number: H01L27/0248 , H01L27/0251 , H03K19/018592
Abstract: An input/output (IO) circuit is provided that reduces stress on a driver without using an additional reference voltage. The IO circuit receives an overshoot voltage and an undershoot voltage in a receive mode. The IO circuit includes a driver circuit. The driver circuit includes an NMOS transistor coupled to a PMOS transistor. A pad is coupled to the driver circuit. A PMOS protect circuit is coupled to the driver circuit and the pad. An NMOS protect circuit is coupled to the driver circuit and the pad. The NMOS protect circuit is configured to be activated only for a duration of the overshoot voltage received at the pad during the receive mode and the PMOS protect circuit is configured to be activated only for a duration of the undershoot voltage received at the pad during the receive mode.
Abstract translation: 提供了一种输入/输出（IO）电路，可以减少驱动器的压力，而不需要额外的参考电压。 IO电路在接收模式下接收过冲电压和下冲电压。 IO电路包括一个驱动电路。 驱动器电路包括耦合到PMOS晶体管的NMOS晶体管。 焊盘耦合到驱动器电路。 PMOS保护电路耦合到驱动器电路和焊盘。 NMOS保护电路耦合到驱动器电路和焊盘。 NMOS保护电路被配置为仅在接收模式期间仅在焊盘处接收到的过冲电压的持续时间被激活，并且PMOS保护电路被配置为仅在接收期间在焊盘处接收到的下冲电压的持续时间被激活 模式。
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